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author | Sai Pavan Boddu <sai.pavan.boddu@xilinx.com> | 2020-05-12 20:24:46 +0530 |
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committer | Jason Wang <jasowang@redhat.com> | 2020-06-18 21:05:51 +0800 |
commit | 4c70e32f05fc7903185a4e9d01987ee3de2052f6 (patch) | |
tree | 63eced1940fb741fc2bfb4778bd6c58b66023549 /hw/microblaze | |
parent | 86a29d4c72e42130e08bae3335c25575d4af0b4d (diff) |
net: cadence_gem: Define access permission for interrupt registers
Q1 to Q7 ISR's are clear-on-read, IER/IDR registers
are write-only, mask reg are read-only.
Signed-off-by: Sai Pavan Boddu <sai.pavan.boddu@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Jason Wang <jasowang@redhat.com>
Diffstat (limited to 'hw/microblaze')
0 files changed, 0 insertions, 0 deletions