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authorPaul Brook <paul@codesourcery.com>2009-05-08 02:35:15 +0100
committerPaul Brook <paul@codesourcery.com>2009-05-08 02:35:15 +0100
commit2ac711791b2e4aabc5e4046b7428727828c705eb (patch)
treec4ed47028dee4949cc7eace9760a20d1759406e2 /hw/mcf5206.c
parente612a1f7256bb3546cf3e9ae6cad3997c4153663 (diff)
Replace cpu_abort with hw_error
Signed-off-by: Paul Brook <paul@codesourcery.com>
Diffstat (limited to 'hw/mcf5206.c')
-rw-r--r--hw/mcf5206.c22
1 files changed, 10 insertions, 12 deletions
diff --git a/hw/mcf5206.c b/hw/mcf5206.c
index ee41a61185..b570376a4d 100644
--- a/hw/mcf5206.c
+++ b/hw/mcf5206.c
@@ -61,11 +61,9 @@ static void m5206_timer_recalibrate(m5206_timer_state *s)
prescale *= 16;
if (mode == 3 || mode == 0)
- cpu_abort(cpu_single_env,
- "m5206_timer: mode %d not implemented\n", mode);
+ hw_error("m5206_timer: mode %d not implemented\n", mode);
if ((s->tmr & TMR_FRR) == 0)
- cpu_abort(cpu_single_env,
- "m5206_timer: free running mode not implemented\n");
+ hw_error("m5206_timer: free running mode not implemented\n");
/* Assume 66MHz system clock. */
ptimer_set_freq(s->timer, 66000000 / prescale);
@@ -296,7 +294,7 @@ static uint32_t m5206_mbar_read(m5206_mbar_state *s, uint32_t offset)
case 0x170: return s->uivr[0];
case 0x1b0: return s->uivr[1];
}
- cpu_abort(cpu_single_env, "Bad MBAR read offset 0x%x", (int)offset);
+ hw_error("Bad MBAR read offset 0x%x", (int)offset);
return 0;
}
@@ -350,7 +348,7 @@ static void m5206_mbar_write(m5206_mbar_state *s, uint32_t offset,
s->uivr[1] = value;
break;
default:
- cpu_abort(cpu_single_env, "Bad MBAR write offset 0x%x", (int)offset);
+ hw_error("Bad MBAR write offset 0x%x", (int)offset);
break;
}
}
@@ -377,7 +375,7 @@ static uint32_t m5206_mbar_readb(void *opaque, target_phys_addr_t offset)
m5206_mbar_state *s = (m5206_mbar_state *)opaque;
offset &= 0x3ff;
if (offset > 0x200) {
- cpu_abort(cpu_single_env, "Bad MBAR read offset 0x%x", (int)offset);
+ hw_error("Bad MBAR read offset 0x%x", (int)offset);
}
if (m5206_mbar_width[offset >> 2] > 1) {
uint16_t val;
@@ -396,7 +394,7 @@ static uint32_t m5206_mbar_readw(void *opaque, target_phys_addr_t offset)
int width;
offset &= 0x3ff;
if (offset > 0x200) {
- cpu_abort(cpu_single_env, "Bad MBAR read offset 0x%x", (int)offset);
+ hw_error("Bad MBAR read offset 0x%x", (int)offset);
}
width = m5206_mbar_width[offset >> 2];
if (width > 2) {
@@ -420,7 +418,7 @@ static uint32_t m5206_mbar_readl(void *opaque, target_phys_addr_t offset)
int width;
offset &= 0x3ff;
if (offset > 0x200) {
- cpu_abort(cpu_single_env, "Bad MBAR read offset 0x%x", (int)offset);
+ hw_error("Bad MBAR read offset 0x%x", (int)offset);
}
width = m5206_mbar_width[offset >> 2];
if (width < 4) {
@@ -444,7 +442,7 @@ static void m5206_mbar_writeb(void *opaque, target_phys_addr_t offset,
int width;
offset &= 0x3ff;
if (offset > 0x200) {
- cpu_abort(cpu_single_env, "Bad MBAR write offset 0x%x", (int)offset);
+ hw_error("Bad MBAR write offset 0x%x", (int)offset);
}
width = m5206_mbar_width[offset >> 2];
if (width > 1) {
@@ -468,7 +466,7 @@ static void m5206_mbar_writew(void *opaque, target_phys_addr_t offset,
int width;
offset &= 0x3ff;
if (offset > 0x200) {
- cpu_abort(cpu_single_env, "Bad MBAR write offset 0x%x", (int)offset);
+ hw_error("Bad MBAR write offset 0x%x", (int)offset);
}
width = m5206_mbar_width[offset >> 2];
if (width > 2) {
@@ -496,7 +494,7 @@ static void m5206_mbar_writel(void *opaque, target_phys_addr_t offset,
int width;
offset &= 0x3ff;
if (offset > 0x200) {
- cpu_abort(cpu_single_env, "Bad MBAR write offset 0x%x", (int)offset);
+ hw_error("Bad MBAR write offset 0x%x", (int)offset);
}
width = m5206_mbar_width[offset >> 2];
if (width < 4) {