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authorblueswir1 <blueswir1@c046a42c-6fe2-441c-8c8c-71466251a162>2009-02-07 10:48:26 +0000
committerblueswir1 <blueswir1@c046a42c-6fe2-441c-8c8c-71466251a162>2009-02-07 10:48:26 +0000
commit68af3f249157f2538fea806622c45f537d65c9bc (patch)
tree4baaebce58782ca6a50f0d107b6e60f7b64816f4 /hw/mac_nvram.c
parent0a645949d519321c6f1560ee38ab6470edb06736 (diff)
Add it_shift
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6547 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'hw/mac_nvram.c')
-rw-r--r--hw/mac_nvram.c12
1 files changed, 8 insertions, 4 deletions
diff --git a/hw/mac_nvram.c b/hw/mac_nvram.c
index 3d3e557297..ae4d4bbf46 100644
--- a/hw/mac_nvram.c
+++ b/hw/mac_nvram.c
@@ -40,6 +40,7 @@ do { printf("NVR: " fmt , ##args); } while (0)
struct MacIONVRAMState {
target_phys_addr_t size;
int mem_index;
+ unsigned int it_shift;
uint8_t *data;
};
@@ -75,7 +76,7 @@ static void macio_nvram_writeb (void *opaque,
{
MacIONVRAMState *s = opaque;
- addr = (addr >> 4) & (s->size - 1);
+ addr = (addr >> s->it_shift) & (s->size - 1);
s->data[addr] = value;
NVR_DPRINTF("writeb addr %04x val %x\n", (int)addr, value);
}
@@ -85,7 +86,7 @@ static uint32_t macio_nvram_readb (void *opaque, target_phys_addr_t addr)
MacIONVRAMState *s = opaque;
uint32_t value;
- addr = (addr >> 4) & (s->size - 1);
+ addr = (addr >> s->it_shift) & (s->size - 1);
value = s->data[addr];
NVR_DPRINTF("readb addr %04x val %x\n", (int)addr, value);
@@ -127,13 +128,15 @@ static void macio_nvram_reset(void *opaque)
{
}
-MacIONVRAMState *macio_nvram_init (int *mem_index, target_phys_addr_t size)
+MacIONVRAMState *macio_nvram_init (int *mem_index, target_phys_addr_t size,
+ unsigned int it_shift)
{
MacIONVRAMState *s;
s = qemu_mallocz(sizeof(MacIONVRAMState));
s->data = qemu_mallocz(size);
s->size = size;
+ s->it_shift = it_shift;
s->mem_index = cpu_register_io_memory(0, nvram_read, nvram_write, s);
*mem_index = s->mem_index;
@@ -150,7 +153,8 @@ void macio_nvram_map (void *opaque, target_phys_addr_t mem_base)
MacIONVRAMState *s;
s = opaque;
- cpu_register_physical_memory(mem_base, s->size << 4, s->mem_index);
+ cpu_register_physical_memory(mem_base, s->size << s->it_shift,
+ s->mem_index);
}
/* Set up a system OpenBIOS NVRAM partition */