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authorblueswir1 <blueswir1@c046a42c-6fe2-441c-8c8c-71466251a162>2007-04-14 13:01:31 +0000
committerblueswir1 <blueswir1@c046a42c-6fe2-441c-8c8c-71466251a162>2007-04-14 13:01:31 +0000
commit3ccacc4a16f01a6dc0e863e2cbdbcc6ba1171e99 (patch)
treed4c6ae3e5845e50e01f104bad2239416beea1389 /hw/m48t59.c
parent16c00cb2c2017aaa04f2849903210761825145e7 (diff)
Add device save and reset methods to FDC and M48T59
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2665 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'hw/m48t59.c')
-rw-r--r--hw/m48t59.c41
1 files changed, 40 insertions, 1 deletions
diff --git a/hw/m48t59.c b/hw/m48t59.c
index 1c61401c52..e9fb0901b7 100644
--- a/hw/m48t59.c
+++ b/hw/m48t59.c
@@ -1,7 +1,7 @@
/*
* QEMU M48T59 and M48T08 NVRAM emulation for PPC PREP and Sparc platforms
*
- * Copyright (c) 2003-2005 Jocelyn Mayer
+ * Copyright (c) 2003-2005, 2007 Jocelyn Mayer
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
@@ -575,12 +575,47 @@ static CPUReadMemoryFunc *nvram_read[] = {
&nvram_readl,
};
+static void m48t59_save(QEMUFile *f, void *opaque)
+{
+ m48t59_t *s = opaque;
+
+ qemu_put_8s(f, &s->lock);
+ qemu_put_be16s(f, &s->addr);
+ qemu_put_buffer(f, s->buffer, s->size);
+}
+
+static int m48t59_load(QEMUFile *f, void *opaque, int version_id)
+{
+ m48t59_t *s = opaque;
+
+ if (version_id != 1)
+ return -EINVAL;
+
+ qemu_get_8s(f, &s->lock);
+ qemu_get_be16s(f, &s->addr);
+ qemu_get_buffer(f, s->buffer, s->size);
+
+ return 0;
+}
+
+static void m48t59_reset(void *opaque)
+{
+ m48t59_t *NVRAM = opaque;
+
+ if (NVRAM->alrm_timer != NULL)
+ qemu_del_timer(NVRAM->alrm_timer);
+
+ if (NVRAM->wd_timer != NULL)
+ qemu_del_timer(NVRAM->wd_timer);
+}
+
/* Initialisation routine */
m48t59_t *m48t59_init (qemu_irq IRQ, target_ulong mem_base,
uint32_t io_base, uint16_t size,
int type)
{
m48t59_t *s;
+ target_ulong save_base;
s = qemu_mallocz(sizeof(m48t59_t));
if (!s)
@@ -610,5 +645,9 @@ m48t59_t *m48t59_init (qemu_irq IRQ, target_ulong mem_base,
}
s->lock = 0;
+ qemu_register_reset(m48t59_reset, s);
+ save_base = mem_base ? mem_base : io_base;
+ register_savevm("m48t59", save_base, 1, m48t59_save, m48t59_load, s);
+
return s;
}