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authorPaolo Bonzini <pbonzini@redhat.com>2016-06-17 17:12:09 +0200
committerPaolo Bonzini <pbonzini@redhat.com>2016-06-29 14:03:46 +0200
commit35a6b23c824e54055f1a2ab30fa5b051a82cdda6 (patch)
tree2167b74a2c8ecd312dd18cf97599134957d4cfb0 /hw/isa
parenta94dd6a9d693829bf8fb04cd6d85c797ed90a5d7 (diff)
ich9: unify pic and ioapic IRQ vectors
ich9->pic and ich9->ioapic differ for the first 16 GSIs (because ich9->pic is wired to 8259+IOAPIC but ich9->ioapic is wired to IOAPIC only). However, ich9->ioapic is never used for the first 16 GSIs, so the two vectors can be merged. Reviewed-by: Efimov Vasily <real@ispras.ru> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'hw/isa')
-rw-r--r--hw/isa/lpc_ich9.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/hw/isa/lpc_ich9.c b/hw/isa/lpc_ich9.c
index 2caa5e9691..3bdb78d255 100644
--- a/hw/isa/lpc_ich9.c
+++ b/hw/isa/lpc_ich9.c
@@ -225,7 +225,7 @@ static void ich9_lpc_update_pic(ICH9LPCState *lpc, int gsi)
pic_level |= lpc->sci_level;
}
- qemu_set_irq(lpc->pic[gsi], pic_level);
+ qemu_set_irq(lpc->gsi[gsi], pic_level);
}
/* APIC mode: GSIx: PIRQ[A-H] -> GSI 16, ... no pirq shares same APIC pins. */
@@ -251,7 +251,7 @@ static void ich9_lpc_update_apic(ICH9LPCState *lpc, int gsi)
level |= lpc->sci_level;
}
- qemu_set_irq(lpc->ioapic[gsi], level);
+ qemu_set_irq(lpc->gsi[gsi], level);
}
void ich9_lpc_set_irq(void *opaque, int pirq, int level)