diff options
| author | Bernhard Beschow <shentey@gmail.com> | 2023-10-07 14:38:17 +0200 |
|---|---|---|
| committer | Michael S. Tsirkin <mst@redhat.com> | 2023-10-22 05:18:16 -0400 |
| commit | 64127940aeb674cb5d9d8d0ea4ca20591bf2b010 (patch) | |
| tree | fda087bb111d1e600fffc807cf94c76858ddaec4 /hw/isa | |
| parent | 295385127e83a923e166f8b4fe1e543ee4540018 (diff) | |
hw/isa/piix3: Wire PIC IRQs to ISA bus in host device
Thie PIIX3 south bridge implements both the PIC and the ISA bus, so wiring the
interrupts there makes the device model more self-contained. Furthermore, this
allows the ISA interrupts to be wired to internal child devices in
pci_piix3_realize() which will be performed in subsequent patches.
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Message-Id: <20231007123843.127151-10-shentey@gmail.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Diffstat (limited to 'hw/isa')
| -rw-r--r-- | hw/isa/piix3.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/hw/isa/piix3.c b/hw/isa/piix3.c index 616f5418fa..3e7c42fa68 100644 --- a/hw/isa/piix3.c +++ b/hw/isa/piix3.c @@ -278,6 +278,8 @@ static void pci_piix3_realize(PCIDevice *dev, Error **errp) memory_region_add_subregion_overlap(pci_address_space_io(dev), PIIX_RCR_IOPORT, &d->rcr_mem, 1); + isa_bus_register_input_irqs(isa_bus, d->isa_irqs_in); + i8257_dma_init(isa_bus, 0); /* RTC */ |