hw/isa/superio: Factor out the parallel code from pc87312.c

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20180308223946.26784-11-f4bug@amsat.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

1 files changed, 65 insertions, 0 deletions

diff --git a/hw/isa/isa-superio.c b/hw/isa/isa-superio.c
index 14ec16f831..eb263fcc3a 100644
--- a/hw/isa/isa-superio.c
+++ b/hw/isa/isa-superio.c
@@ -10,14 +10,79 @@
  * SPDX-License-Identifier: GPL-2.0-or-later
  */
 #include "qemu/osdep.h"
+#include "qemu/error-report.h"
+#include "sysemu/sysemu.h"
+#include "chardev/char.h"
 #include "hw/isa/superio.h"
 #include "trace.h"
 
+static void isa_superio_realize(DeviceState *dev, Error **errp)
+{
+    ISASuperIODevice *sio = ISA_SUPERIO(dev);
+    ISASuperIOClass *k = ISA_SUPERIO_GET_CLASS(sio);
+    ISABus *bus = isa_bus_from_device(ISA_DEVICE(dev));
+    ISADevice *isa;
+    DeviceState *d;
+    Chardev *chr;
+    char *name;
+    int i;
+
+    /* Parallel port */
+    for (i = 0; i < k->parallel.count; i++) {
+        if (i >= ARRAY_SIZE(sio->parallel)) {
+            warn_report("superio: ignoring %td parallel controllers",
+                        k->parallel.count - ARRAY_SIZE(sio->parallel));
+            break;
+        }
+        if (!k->parallel.is_enabled || k->parallel.is_enabled(sio, i)) {
+            /* FIXME use a qdev chardev prop instead of parallel_hds[] */
+            chr = parallel_hds[i];
+            if (chr == NULL || chr->be) {
+                name = g_strdup_printf("discarding-parallel%d", i);
+                chr = qemu_chr_new(name, "null");
+            } else {
+                name = g_strdup_printf("parallel%d", i);
+            }
+            isa = isa_create(bus, "isa-parallel");
+            d = DEVICE(isa);
+            qdev_prop_set_uint32(d, "index", i);
+            if (k->parallel.get_iobase) {
+                qdev_prop_set_uint32(d, "iobase",
+                                     k->parallel.get_iobase(sio, i));
+            }
+            if (k->parallel.get_irq) {
+                qdev_prop_set_uint32(d, "irq", k->parallel.get_irq(sio, i));
+            }
+            qdev_prop_set_chr(d, "chardev", chr);
+            qdev_init_nofail(d);
+            sio->parallel[i] = isa;
+            trace_superio_create_parallel(i,
+                                          k->parallel.get_iobase ?
+                                          k->parallel.get_iobase(sio, i) : -1,
+                                          k->parallel.get_irq ?
+                                          k->parallel.get_irq(sio, i) : -1);
+            object_property_add_child(OBJECT(dev), name,
+                                      OBJECT(sio->parallel[i]), NULL);
+            g_free(name);
+        }
+    }
+}
+
+static void isa_superio_class_init(ObjectClass *oc, void *data)
+{
+    DeviceClass *dc = DEVICE_CLASS(oc);
+
+    dc->realize = isa_superio_realize;
+    /* Reason: Uses parallel_hds[0] in realize(), so it can't be used twice */
+    dc->user_creatable = false;
+}
+
 static const TypeInfo isa_superio_type_info = {
     .name = TYPE_ISA_SUPERIO,
     .parent = TYPE_ISA_DEVICE,
     .abstract = true,
     .class_size = sizeof(ISASuperIOClass),
+    .class_init = isa_superio_class_init,
 };
 
 static void isa_superio_register_types(void)