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authorXiaojuan Yang <yangxiaojuan@loongson.cn>2022-09-30 17:51:39 +0800
committerSong Gao <gaosong@loongson.cn>2022-10-17 10:28:35 +0800
commit5ef4a4af8b41fb175374726f379a2aea79929023 (patch)
treef475b22875dbb734cc82cb51247c39cc056307c4 /hw/intc
parent7bf36a5c5276c4dc7926a0bc2e5ebbd93eedac41 (diff)
hw/intc: Fix LoongArch ipi device emulation
In ipi_send function, it should not to set irq before writing data to dest cpu iocsr space, as the irq will trigger after data writing. When call this function 'address_space_stl()', it will trigger loongarch_ipi_writel(), the addr arg is 0x1008 ('CORE_SET_OFF'), and qemu_irq_raise will be called in this case. Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220930095139.867115-3-yangxiaojuan@loongson.cn> Signed-off-by: Song Gao <gaosong@loongson.cn>
Diffstat (limited to 'hw/intc')
-rw-r--r--hw/intc/loongarch_ipi.c1
1 files changed, 0 insertions, 1 deletions
diff --git a/hw/intc/loongarch_ipi.c b/hw/intc/loongarch_ipi.c
index 4f3c58f872..aa4bf9eb74 100644
--- a/hw/intc/loongarch_ipi.c
+++ b/hw/intc/loongarch_ipi.c
@@ -88,7 +88,6 @@ static void ipi_send(uint64_t val)
cs = qemu_get_cpu(cpuid);
cpu = LOONGARCH_CPU(cs);
env = &cpu->env;
- loongarch_cpu_set_irq(cpu, IRQ_IPI, 1);
address_space_stl(&env->address_space_iocsr, 0x1008,
data, MEMTXATTRS_UNSPECIFIED, NULL);