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author | Peter Maydell <peter.maydell@linaro.org> | 2020-11-19 21:56:09 +0000 |
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committer | Peter Maydell <peter.maydell@linaro.org> | 2020-12-10 11:44:56 +0000 |
commit | fe6fa228a71f0eb8b8ee315452e6a7736c537b1f (patch) | |
tree | bef043f021a9dc5ac7ed5cb5e3f3f4ce009a3b35 /hw/intc/armv7m_nvic.c | |
parent | 3423fbf10427db7680d3237d4f62d8370052fca0 (diff) |
target/arm: Implement new v8.1M VLLDM and VLSTM encodings
v8.1M adds new encodings of VLLDM and VLSTM (where bit 7 is set).
The only difference is that:
* the old T1 encodings UNDEF if the implementation implements 32
Dregs (this is currently architecturally impossible for M-profile)
* the new T2 encodings have the implementation-defined option to
read from memory (discarding the data) or write UNKNOWN values to
memory for the stack slots that would be D16-D31
We choose not to make those accesses, so for us the two
instructions behave identically assuming they don't UNDEF.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20201119215617.29887-21-peter.maydell@linaro.org
Diffstat (limited to 'hw/intc/armv7m_nvic.c')
0 files changed, 0 insertions, 0 deletions