diff options
author | Alexander Graf <agraf@suse.de> | 2013-06-30 02:36:14 +0200 |
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committer | Alexander Graf <agraf@suse.de> | 2013-07-11 18:51:25 +0200 |
commit | 4aa3510f6f36c5ea35219acf641788222d977437 (patch) | |
tree | 6478da14c50fecc2f98636dc2e4d635998f05b4d /hw/ide/macio.c | |
parent | d2f0ce2189feef94516d81fa5834fa4d65435053 (diff) |
PPC: dbdma: macio: Add DMA callback
We need to know when the IDE core starts a DMA transfer. Add a notifier
function so we have the chance to start transmitting data.
Signed-off-by: Alexander Graf <agraf@suse.de>
Diffstat (limited to 'hw/ide/macio.c')
-rw-r--r-- | hw/ide/macio.c | 40 |
1 files changed, 40 insertions, 0 deletions
diff --git a/hw/ide/macio.c b/hw/ide/macio.c index 8d42b5c2bb..126549dcdc 100644 --- a/hw/ide/macio.c +++ b/hw/ide/macio.c @@ -359,11 +359,50 @@ static void macio_ide_reset(DeviceState *dev) ide_bus_reset(&d->bus); } +static int ide_nop(IDEDMA *dma) +{ + return 0; +} + +static int ide_nop_int(IDEDMA *dma, int x) +{ + return 0; +} + +static void ide_nop_restart(void *opaque, int x, RunState y) +{ +} + +static void ide_dbdma_start(IDEDMA *dma, IDEState *s, + BlockDriverCompletionFunc *cb) +{ + MACIOIDEState *m = container_of(dma, MACIOIDEState, dma); + + MACIO_DPRINTF("\n"); + DBDMA_kick(m->dbdma); +} + +static const IDEDMAOps dbdma_ops = { + .start_dma = ide_dbdma_start, + .start_transfer = ide_nop, + .prepare_buf = ide_nop_int, + .rw_buf = ide_nop_int, + .set_unit = ide_nop_int, + .add_status = ide_nop_int, + .set_inactive = ide_nop, + .restart_cb = ide_nop_restart, + .reset = ide_nop, +}; + static void macio_ide_realizefn(DeviceState *dev, Error **errp) { MACIOIDEState *s = MACIO_IDE(dev); ide_init2(&s->bus, s->irq); + + /* Register DMA callbacks */ + s->dma.ops = &dbdma_ops; + s->bus.dma = &s->dma; } static void macio_ide_initfn(Object *obj) @@ -414,6 +453,7 @@ void macio_ide_init_drives(MACIOIDEState *s, DriveInfo **hd_table) void macio_ide_register_dma(MACIOIDEState *s, void *dbdma, int channel) { + s->dbdma = dbdma; DBDMA_register_channel(dbdma, channel, s->dma_irq, pmac_ide_transfer, pmac_ide_flush, s); } |