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authorFrank Chang <frank.chang@sifive.com>2021-09-12 21:05:46 +0800
committerAlistair Francis <alistair.francis@wdc.com>2021-09-21 07:56:49 +1000
commit9a8c26c08c3fe6c80e47b75369a34e6e7f6cd11f (patch)
tree1d85024ec8d239b8cf2e76a08c1bc8bb3d59100a /hw/i386
parentde7c7988d25d3e0abfad11261b21a21d40ce255f (diff)
hw/dma: sifive_pdma: claim bit must be set before DMA transactions
Real PDMA must have Control.claim bit to be set before Control.run bit is set to start any DMA transactions. Otherwise nothing will be transferred. The following result is PDMA tested in U-Boot on Unmatched board: => mw.l 0x3000000 0x0 <= Disclaim channel 0 (Channel 0 is not claimed) => mw.l 0x3000004 0x55000000 <= wsize = rsize = 5 (2^5 = 32 bytes) => mw.q 0x3000008 0x2 <= NextBytes = 2 => mw.q 0x3000010 0x84000000 <= NextDestination = 0x84000000 => mw.q 0x3000018 0x84001000 <= NextSource = 0x84001000 => mw.l 0x84000000 0x87654321 <= Fill test data to dst => mw.l 0x84001000 0x12345678 <= Fill test data to src => md.l 0x84000000 1; md.l 0x84001000 1 <= Dump src/dst memory contents 84000000: 87654321 !Ce. 84001000: 12345678 xV4. => md.l 0x3000000 8 <= Dump PDMA status 03000000: 00000000 55000000 00000002 00000000 .......U........ 03000010: 84000000 00000000 84001000 00000000 ................ => mw.l 0x3000000 0x3 <= Set channel 0 run and claim bits => md.l 0x3000000 8 <= Dump PDMA status 03000000: 00000001 66000000 00000000 00000000 .......f........ 03000010: 00000000 00000000 00000000 00000000 ................ => md.l 0x84000000 1; md.l 0x84001000 1 <= Dump src/dst memory contents 84000000: 87654321 !Ce. 84001000: 12345678 xV4. Signed-off-by: Frank Chang <frank.chang@sifive.com> Tested-by: Max Hsu <max.hsu@sifive.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Message-id: 20210912130553.179501-3-frank.chang@sifive.com Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'hw/i386')
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