diff options
author | Peter Xu <peterx@redhat.com> | 2016-07-14 13:56:13 +0800 |
---|---|---|
committer | Michael S. Tsirkin <mst@redhat.com> | 2016-07-20 19:30:27 +0300 |
commit | 1121e0afdcfa0cd40e36bd3acff56a3fac4f70fd (patch) | |
tree | 9774edb4f2cf891559149f86b8c963fbe78d9f37 /hw/i386/x86-iommu.c | |
parent | 1cf5fd573f536de1eb601ed69127a324e940d37f (diff) |
x86-iommu: introduce "intremap" property
Adding one property for intel-iommu devices to specify whether we should
support interrupt remapping. By default, IR is disabled. To enable it,
we should use (take Intel IOMMU as example):
-device intel_iommu,intremap=on
This property can be shared by Intel and future AMD IOMMUs.
Signed-off-by: Peter Xu <peterx@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Diffstat (limited to 'hw/i386/x86-iommu.c')
-rw-r--r-- | hw/i386/x86-iommu.c | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/hw/i386/x86-iommu.c b/hw/i386/x86-iommu.c index f395139b97..4280839860 100644 --- a/hw/i386/x86-iommu.c +++ b/hw/i386/x86-iommu.c @@ -59,9 +59,32 @@ static void x86_iommu_class_init(ObjectClass *klass, void *data) dc->realize = x86_iommu_realize; } +static bool x86_iommu_intremap_prop_get(Object *o, Error **errp) +{ + X86IOMMUState *s = X86_IOMMU_DEVICE(o); + return s->intr_supported; +} + +static void x86_iommu_intremap_prop_set(Object *o, bool value, Error **errp) +{ + X86IOMMUState *s = X86_IOMMU_DEVICE(o); + s->intr_supported = value; +} + +static void x86_iommu_instance_init(Object *o) +{ + X86IOMMUState *s = X86_IOMMU_DEVICE(o); + + /* By default, do not support IR */ + s->intr_supported = false; + object_property_add_bool(o, "intremap", x86_iommu_intremap_prop_get, + x86_iommu_intremap_prop_set, NULL); +} + static const TypeInfo x86_iommu_info = { .name = TYPE_X86_IOMMU_DEVICE, .parent = TYPE_SYS_BUS_DEVICE, + .instance_init = x86_iommu_instance_init, .instance_size = sizeof(X86IOMMUState), .class_init = x86_iommu_class_init, .class_size = sizeof(X86IOMMUClass), |