diff options
author | Anthony Liguori <aliguori@us.ibm.com> | 2013-06-28 11:48:09 -0500 |
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committer | Anthony Liguori <aliguori@us.ibm.com> | 2013-06-28 11:48:09 -0500 |
commit | 8a9c98aedc1a3fb4dfbebeccc926e273df54f2ba (patch) | |
tree | b800dd8b6131717bf397103ec4d7199f67ea0c5c /hw/i386/kvmvapic.c | |
parent | 36125631e79d53ffb9365740f43f386e2171d116 (diff) | |
parent | c658b94f6e8c206c59d02aa6fbac285b86b53d2c (diff) |
Merge remote-tracking branch 'afaerber/qom-cpu' into staging
# By Andreas Färber
# Via Andreas Färber
* afaerber/qom-cpu: (24 commits)
cpu: Turn cpu_unassigned_access() into a CPUState hook
hwaddr: Make hwaddr type usable beyond softmmu
cpu: Change qemu_init_vcpu() argument to CPUState
cpus: Change qemu_dummy_start_vcpu() argument to CPUState
cpus: Change qemu_kvm_start_vcpu() argument to CPUState
cpus: Change cpu_handle_guest_debug() argument to CPUState
gdbstub: Set gdb_set_stop_cpu() argument to CPUState
kvm: Change kvm_cpu_exec() argument to CPUState
kvm: Change kvm_handle_internal_error() argument to CPUState
cpu: Turn cpu_dump_{state,statistics}() into CPUState hooks
cpus: Change qemu_kvm_init_cpu_signals() argument to CPUState
kvm: Change kvm_set_signal_mask() argument to CPUState
cpus: Change qemu_kvm_wait_io_event() argument to CPUState
cpus: Change cpu_thread_is_idle() argument to CPUState
cpu: Change cpu_exit() argument to CPUState
kvm: Change cpu_synchronize_state() argument to CPUState
kvm: Change kvm_cpu_synchronize_state() argument to CPUState
gdbstub: Simplify find_cpu()
cpu: Guard cpu_{save,load}() definitions
target-openrisc: Register VMStateDescription for OpenRISCCPU
...
Diffstat (limited to 'hw/i386/kvmvapic.c')
-rw-r--r-- | hw/i386/kvmvapic.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/hw/i386/kvmvapic.c b/hw/i386/kvmvapic.c index 655483bd1d..f93629f9d4 100644 --- a/hw/i386/kvmvapic.c +++ b/hw/i386/kvmvapic.c @@ -456,7 +456,7 @@ void vapic_report_tpr_access(DeviceState *dev, CPUState *cs, target_ulong ip, X86CPU *cpu = X86_CPU(cs); CPUX86State *env = &cpu->env; - cpu_synchronize_state(env); + cpu_synchronize_state(cs); if (evaluate_tpr_instruction(s, env, &ip, access) < 0) { if (s->state == VAPIC_ACTIVE) { @@ -627,7 +627,7 @@ static void vapic_write(void *opaque, hwaddr addr, uint64_t data, hwaddr rom_paddr; VAPICROMState *s = opaque; - cpu_synchronize_state(env); + cpu_synchronize_state(CPU(x86_env_get_cpu(env))); /* * The VAPIC supports two PIO-based hypercalls, both via port 0x7E. |