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authorJan Kiszka <jan.kiszka@siemens.com>2018-05-22 09:07:53 +0200
committerMichael S. Tsirkin <mst@redhat.com>2018-06-26 21:58:03 +0300
commit2073bd43bd40ff6fc36f293a569bff113c0923d4 (patch)
tree635f4e92f7ce380093c1a9fc1f51b41572c159e2 /hw/i386/amd_iommu.h
parent0b363b61f1b7530572d7f4d26a3cff390a2100d5 (diff)
hw/i386: Fix AMDVI GATS and HATS encodings
We support up to 6 levels, but those are encoded as 10b according to the AMD IOMMU spec (chapter 3.3.1, Extended Feature Register). Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Diffstat (limited to 'hw/i386/amd_iommu.h')
-rw-r--r--hw/i386/amd_iommu.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/hw/i386/amd_iommu.h b/hw/i386/amd_iommu.h
index aeef802364..874030582d 100644
--- a/hw/i386/amd_iommu.h
+++ b/hw/i386/amd_iommu.h
@@ -165,8 +165,8 @@
#define AMDVI_DTE_UPPER_QUAD_RESERVED 0x08f0000000000000
/* AMDVI paging mode */
-#define AMDVI_GATS_MODE (6ULL << 12)
-#define AMDVI_HATS_MODE (6ULL << 10)
+#define AMDVI_GATS_MODE (2ULL << 12)
+#define AMDVI_HATS_MODE (2ULL << 10)
/* IOTLB */
#define AMDVI_IOTLB_MAX_SIZE 1024