diff options
author | Jamin Lin <jamin_lin@aspeedtech.com> | 2022-05-25 10:31:33 +0200 |
---|---|---|
committer | Cédric Le Goater <clg@kaod.org> | 2022-05-25 10:31:33 +0200 |
commit | 7b1d21a8ba1e6091f1e54c74e7c664e26300accc (patch) | |
tree | cfd6b74e1f3984db3c295ef4c0743edcee421047 /hw/gpio/trace-events | |
parent | 6827ff20b2975e84045ba356ba3e6aadc686a53c (diff) |
hw/gpio Add GPIO read/write trace event.
Add GPIO read/write trace event for aspeed model.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Message-Id: <20220525053444.27228-2-jamin_lin@aspeedtech.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Diffstat (limited to 'hw/gpio/trace-events')
-rw-r--r-- | hw/gpio/trace-events | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/hw/gpio/trace-events b/hw/gpio/trace-events index 1dab99c560..9736b362ac 100644 --- a/hw/gpio/trace-events +++ b/hw/gpio/trace-events @@ -27,3 +27,7 @@ sifive_gpio_read(uint64_t offset, uint64_t r) "offset 0x%" PRIx64 " value 0x%" P sifive_gpio_write(uint64_t offset, uint64_t value) "offset 0x%" PRIx64 " value 0x%" PRIx64 sifive_gpio_set(int64_t line, int64_t value) "line %" PRIi64 " value %" PRIi64 sifive_gpio_update_output_irq(int64_t line, int64_t value) "line %" PRIi64 " value %" PRIi64 + +# aspeed_gpio.c +aspeed_gpio_read(uint64_t offset, uint64_t value) "offset: 0x%" PRIx64 " value 0x%" PRIx64 +aspeed_gpio_write(uint64_t offset, uint64_t value) "offset: 0x%" PRIx64 " value 0x%" PRIx64 |