diff options
author | Evgeny Voevodin <e.voevodin@samsung.com> | 2012-02-16 09:56:05 +0000 |
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committer | Peter Maydell <peter.maydell@linaro.org> | 2012-02-17 11:13:09 +0000 |
commit | 12c775db14c037715e31079e2c17899abd0a2aa6 (patch) | |
tree | 35c727d30a9b37430780c289d55db470c696fa95 /hw/exynos4210.c | |
parent | df91b48f64075595e25a269befed5e4fe75501cb (diff) |
ARM: exynos4210: MCT support.
Signed-off-by: Evgeny Voevodin <e.voevodin@samsung.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/exynos4210.c')
-rw-r--r-- | hw/exynos4210.c | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/hw/exynos4210.c b/hw/exynos4210.c index f922f5572b..558f6697e3 100644 --- a/hw/exynos4210.c +++ b/hw/exynos4210.c @@ -32,6 +32,9 @@ /* PWM */ #define EXYNOS4210_PWM_BASE_ADDR 0x139D0000 +/* MCT */ +#define EXYNOS4210_MCT_BASE_ADDR 0x10050000 + /* UART's definitions */ #define EXYNOS4210_UART0_BASE_ADDR 0x13800000 #define EXYNOS4210_UART1_BASE_ADDR 0x13810000 @@ -220,6 +223,22 @@ Exynos4210State *exynos4210_init(MemoryRegion *system_mem, s->irq_table[exynos4210_get_irq(22, 4)], NULL); + /* Multi Core Timer */ + dev = qdev_create(NULL, "exynos4210.mct"); + qdev_init_nofail(dev); + busdev = sysbus_from_qdev(dev); + for (n = 0; n < 4; n++) { + /* Connect global timer interrupts to Combiner gpio_in */ + sysbus_connect_irq(busdev, n, + s->irq_table[exynos4210_get_irq(1, 4 + n)]); + } + /* Connect local timer interrupts to Combiner gpio_in */ + sysbus_connect_irq(busdev, 4, + s->irq_table[exynos4210_get_irq(51, 0)]); + sysbus_connect_irq(busdev, 5, + s->irq_table[exynos4210_get_irq(35, 3)]); + sysbus_mmio_map(busdev, 0, EXYNOS4210_MCT_BASE_ADDR); + /*** UARTs ***/ exynos4210_uart_create(EXYNOS4210_UART0_BASE_ADDR, EXYNOS4210_UART0_FIFO_SIZE, 0, NULL, |