diff options
author | aurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162> | 2009-01-13 19:08:18 +0000 |
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committer | aurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162> | 2009-01-13 19:08:18 +0000 |
commit | f5cbc474e8d810c8fc176311a70252ceb2368f94 (patch) | |
tree | 40da731ec2fe48e395cc8bd1dfa668a96180c037 /hw/escc.c | |
parent | 6b4079f843a3cb0b63d872f60dd60058c47696b7 (diff) |
ESCC: swap the two CharDriverState arguments
Swap the two CharDriverState arguments so that the first argument
corresponds to the channel A and the second argument to the channel B.
Modify hw/sun4m.c accordingly.
This fixes the order of the serial ports on the PPC machines.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6284 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'hw/escc.c')
-rw-r--r-- | hw/escc.c | 8 |
1 files changed, 4 insertions, 4 deletions
@@ -719,8 +719,8 @@ static int escc_load(QEMUFile *f, void *opaque, int version_id) } -int escc_init(target_phys_addr_t base, qemu_irq irq, CharDriverState *chr1, - CharDriverState *chr2, int clock, int it_shift) +int escc_init(target_phys_addr_t base, qemu_irq irq, CharDriverState *chrA, + CharDriverState *chrB, int clock, int it_shift) { int escc_io_memory, i; SerialState *s; @@ -737,8 +737,8 @@ int escc_init(target_phys_addr_t base, qemu_irq irq, CharDriverState *chr1, escc_io_memory); s->it_shift = it_shift; - s->chn[0].chr = chr1; - s->chn[1].chr = chr2; + s->chn[0].chr = chrB; + s->chn[1].chr = chrA; s->chn[0].disabled = 0; s->chn[1].disabled = 0; |