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authorEduardo Habkost <ehabkost@redhat.com>2020-08-31 17:07:33 -0400
committerEduardo Habkost <ehabkost@redhat.com>2020-09-09 09:27:09 -0400
commit8110fa1d94f2997badc2af39231a1d279c5bb1ee (patch)
tree6bff28c7907dfb0cbb367ca113f4d02ea03f3a51 /hw/dma
parentdb1015e92e04835c9eb50c29625fe566d1202dbd (diff)
Use DECLARE_*CHECKER* macros
Generated using: $ ./scripts/codeconverter/converter.py -i \ --pattern=TypeCheckMacro $(git grep -l '' -- '*.[ch]') Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: Juan Quintela <quintela@redhat.com> Message-Id: <20200831210740.126168-12-ehabkost@redhat.com> Reviewed-by: Juan Quintela <quintela@redhat.com> Message-Id: <20200831210740.126168-13-ehabkost@redhat.com> Message-Id: <20200831210740.126168-14-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Diffstat (limited to 'hw/dma')
-rw-r--r--hw/dma/i82374.c3
-rw-r--r--hw/dma/pl330.c3
-rw-r--r--hw/dma/puv3_dma.c3
-rw-r--r--hw/dma/pxa2xx_dma.c3
-rw-r--r--hw/dma/rc4030.c4
-rw-r--r--hw/dma/xilinx_axidma.c14
6 files changed, 16 insertions, 14 deletions
diff --git a/hw/dma/i82374.c b/hw/dma/i82374.c
index c12946aaef..5b7ff635f7 100644
--- a/hw/dma/i82374.c
+++ b/hw/dma/i82374.c
@@ -33,7 +33,8 @@
#define TYPE_I82374 "i82374"
typedef struct I82374State I82374State;
-#define I82374(obj) OBJECT_CHECK(I82374State, (obj), TYPE_I82374)
+DECLARE_INSTANCE_CHECKER(I82374State, I82374,
+ TYPE_I82374)
//#define DEBUG_I82374
diff --git a/hw/dma/pl330.c b/hw/dma/pl330.c
index 380d45db8f..859586fd2f 100644
--- a/hw/dma/pl330.c
+++ b/hw/dma/pl330.c
@@ -272,7 +272,8 @@ struct PL330State {
};
#define TYPE_PL330 "pl330"
-#define PL330(obj) OBJECT_CHECK(PL330State, (obj), TYPE_PL330)
+DECLARE_INSTANCE_CHECKER(PL330State, PL330,
+ TYPE_PL330)
static const VMStateDescription vmstate_pl330 = {
.name = "pl330",
diff --git a/hw/dma/puv3_dma.c b/hw/dma/puv3_dma.c
index 72e7b395b0..825e3dc0ac 100644
--- a/hw/dma/puv3_dma.c
+++ b/hw/dma/puv3_dma.c
@@ -24,7 +24,8 @@
#define TYPE_PUV3_DMA "puv3_dma"
typedef struct PUV3DMAState PUV3DMAState;
-#define PUV3_DMA(obj) OBJECT_CHECK(PUV3DMAState, (obj), TYPE_PUV3_DMA)
+DECLARE_INSTANCE_CHECKER(PUV3DMAState, PUV3_DMA,
+ TYPE_PUV3_DMA)
struct PUV3DMAState {
SysBusDevice parent_obj;
diff --git a/hw/dma/pxa2xx_dma.c b/hw/dma/pxa2xx_dma.c
index 6ae8035831..4f6c0e5e5e 100644
--- a/hw/dma/pxa2xx_dma.c
+++ b/hw/dma/pxa2xx_dma.c
@@ -36,7 +36,8 @@ typedef struct {
#define TYPE_PXA2XX_DMA "pxa2xx-dma"
typedef struct PXA2xxDMAState PXA2xxDMAState;
-#define PXA2XX_DMA(obj) OBJECT_CHECK(PXA2xxDMAState, (obj), TYPE_PXA2XX_DMA)
+DECLARE_INSTANCE_CHECKER(PXA2xxDMAState, PXA2XX_DMA,
+ TYPE_PXA2XX_DMA)
struct PXA2xxDMAState {
SysBusDevice parent_obj;
diff --git a/hw/dma/rc4030.c b/hw/dma/rc4030.c
index 7d6eaf5e96..c584815d06 100644
--- a/hw/dma/rc4030.c
+++ b/hw/dma/rc4030.c
@@ -57,8 +57,8 @@ typedef struct dma_pagetable_entry {
#define TYPE_RC4030 "rc4030"
typedef struct rc4030State rc4030State;
-#define RC4030(obj) \
- OBJECT_CHECK(rc4030State, (obj), TYPE_RC4030)
+DECLARE_INSTANCE_CHECKER(rc4030State, RC4030,
+ TYPE_RC4030)
#define TYPE_RC4030_IOMMU_MEMORY_REGION "rc4030-iommu-memory-region"
diff --git a/hw/dma/xilinx_axidma.c b/hw/dma/xilinx_axidma.c
index 6d48fea8fe..f313453495 100644
--- a/hw/dma/xilinx_axidma.c
+++ b/hw/dma/xilinx_axidma.c
@@ -44,17 +44,15 @@
#define TYPE_XILINX_AXI_DMA_CONTROL_STREAM "xilinx-axi-dma-control-stream"
typedef struct XilinxAXIDMA XilinxAXIDMA;
-#define XILINX_AXI_DMA(obj) \
- OBJECT_CHECK(XilinxAXIDMA, (obj), TYPE_XILINX_AXI_DMA)
+DECLARE_INSTANCE_CHECKER(XilinxAXIDMA, XILINX_AXI_DMA,
+ TYPE_XILINX_AXI_DMA)
typedef struct XilinxAXIDMAStreamSlave XilinxAXIDMAStreamSlave;
-#define XILINX_AXI_DMA_DATA_STREAM(obj) \
- OBJECT_CHECK(XilinxAXIDMAStreamSlave, (obj),\
- TYPE_XILINX_AXI_DMA_DATA_STREAM)
+DECLARE_INSTANCE_CHECKER(XilinxAXIDMAStreamSlave, XILINX_AXI_DMA_DATA_STREAM,
+ TYPE_XILINX_AXI_DMA_DATA_STREAM)
-#define XILINX_AXI_DMA_CONTROL_STREAM(obj) \
- OBJECT_CHECK(XilinxAXIDMAStreamSlave, (obj),\
- TYPE_XILINX_AXI_DMA_CONTROL_STREAM)
+DECLARE_INSTANCE_CHECKER(XilinxAXIDMAStreamSlave, XILINX_AXI_DMA_CONTROL_STREAM,
+ TYPE_XILINX_AXI_DMA_CONTROL_STREAM)
#define R_DMACR (0x00 / 4)
#define R_DMASR (0x04 / 4)