diff options
author | Peter Maydell <peter.maydell@linaro.org> | 2017-10-31 18:09:11 +0000 |
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committer | Peter Maydell <peter.maydell@linaro.org> | 2017-10-31 18:09:11 +0000 |
commit | 47ba789c97c8d201d01058b00a14d8a9a85fcfe9 (patch) | |
tree | ba3f8522d539ad607057b6305f2bd0d6ea370b39 /hw/dma/sun4m_iommu.c | |
parent | 7fa00e204902cee0b33a0c60de87e87319d1809f (diff) | |
parent | badd3d62c619d24a5af62198374f42b7c510ee41 (diff) |
Merge remote-tracking branch 'remotes/mcayland/tags/qemu-sparc-signed' into staging
qemu-sparc update
# gpg: Signature made Tue 31 Oct 2017 17:43:11 GMT
# gpg: using RSA key 0x5BC2C56FAE0F321F
# gpg: Good signature from "Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>"
# Primary key fingerprint: CC62 1AB9 8E82 200D 915C C9C4 5BC2 C56F AE0F 321F
* remotes/mcayland/tags/qemu-sparc-signed:
sun4m: change TYPE_SUN4M_IOMMU macro from "iommu" to "sun4m-iommu"
sun4m_iommu: remove legacy sparc_iommu_memory_rw() function
sparc32_dma: switch over to using IOMMU memory region and DMA API
sun4m: implement IOMMU translation using IOMMU memory region
sparc32_dma: add len to esp/le DMA memory tracing
sparc32_dma: remove is_ledma hack and replace with memory region alias
sparc32_dma: introduce new SPARC32_DMA type container object
sparc32_dma: make lance device child of ledma device
lance: move TYPE_LANCE and SysBusPCNetState from lance.c to lance.h
sparc32_dma: make esp device child of espdma device
esp: move TYPE_ESP and SysBusESPState from esp.c to esp.h
sparc32_dma: use object link instead of qdev property to pass IOMMU reference
sun4m_iommu: move TYPE_SUN4M_IOMMU declaration to sun4m.h
sun4m: move DMA device wiring from sparc32_dma_init() to sun4m_hw_init()
sparc32_dma: move type declarations from sparc32_dma.c to sparc32_dma.h
sparc32_dma: split esp and le into separate DMA devices
sparc32_dma: rename SPARC32_DMA type to SPARC32_DMA_DEVICE
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/dma/sun4m_iommu.c')
-rw-r--r-- | hw/dma/sun4m_iommu.c | 101 |
1 files changed, 58 insertions, 43 deletions
diff --git a/hw/dma/sun4m_iommu.c b/hw/dma/sun4m_iommu.c index 335ef63cbc..30a05e8823 100644 --- a/hw/dma/sun4m_iommu.c +++ b/hw/dma/sun4m_iommu.c @@ -36,7 +36,6 @@ * http://mediacast.sun.com/users/Barton808/media/Sun4M_SystemArchitecture_edited2.pdf */ -#define IOMMU_NREGS (4*4096/4) #define IOMMU_CTRL (0x0000 >> 2) #define IOMMU_CTRL_IMPL 0xf0000000 /* Implementation */ #define IOMMU_CTRL_VERS 0x0f000000 /* Version */ @@ -128,19 +127,6 @@ #define IOMMU_PAGE_SIZE (1 << IOMMU_PAGE_SHIFT) #define IOMMU_PAGE_MASK ~(IOMMU_PAGE_SIZE - 1) -#define TYPE_SUN4M_IOMMU "iommu" -#define SUN4M_IOMMU(obj) OBJECT_CHECK(IOMMUState, (obj), TYPE_SUN4M_IOMMU) - -typedef struct IOMMUState { - SysBusDevice parent_obj; - - MemoryRegion iomem; - uint32_t regs[IOMMU_NREGS]; - hwaddr iostart; - qemu_irq irq; - uint32_t version; -} IOMMUState; - static uint64_t iommu_mem_read(void *opaque, hwaddr addr, unsigned size) { @@ -292,37 +278,47 @@ static void iommu_bad_addr(IOMMUState *s, hwaddr addr, qemu_irq_raise(s->irq); } -void sparc_iommu_memory_rw(void *opaque, hwaddr addr, - uint8_t *buf, int len, int is_write) +/* Called from RCU critical section */ +static IOMMUTLBEntry sun4m_translate_iommu(IOMMUMemoryRegion *iommu, + hwaddr addr, + IOMMUAccessFlags flags) { - int l; - uint32_t flags; - hwaddr page, phys_addr; - - while (len > 0) { - page = addr & IOMMU_PAGE_MASK; - l = (page + IOMMU_PAGE_SIZE) - addr; - if (l > len) - l = len; - flags = iommu_page_get_flags(opaque, page); - if (!(flags & IOPTE_VALID)) { - iommu_bad_addr(opaque, page, is_write); - return; - } - phys_addr = iommu_translate_pa(addr, flags); - if (is_write) { - if (!(flags & IOPTE_WRITE)) { - iommu_bad_addr(opaque, page, is_write); - return; - } - cpu_physical_memory_write(phys_addr, buf, l); - } else { - cpu_physical_memory_read(phys_addr, buf, l); - } - len -= l; - buf += l; - addr += l; + IOMMUState *is = container_of(iommu, IOMMUState, iommu); + hwaddr page, pa; + int is_write = (flags & IOMMU_WO) ? 1 : 0; + uint32_t pte; + IOMMUTLBEntry ret = { + .target_as = &address_space_memory, + .iova = 0, + .translated_addr = 0, + .addr_mask = ~(hwaddr)0, + .perm = IOMMU_NONE, + }; + + page = addr & IOMMU_PAGE_MASK; + pte = iommu_page_get_flags(is, page); + if (!(pte & IOPTE_VALID)) { + iommu_bad_addr(is, page, is_write); + return ret; } + + pa = iommu_translate_pa(addr, pte); + if (is_write && !(pte & IOPTE_WRITE)) { + iommu_bad_addr(is, page, is_write); + return ret; + } + + if (pte & IOPTE_WRITE) { + ret.perm = IOMMU_RW; + } else { + ret.perm = IOMMU_RO; + } + + ret.iova = page; + ret.translated_addr = pa; + ret.addr_mask = ~IOMMU_PAGE_MASK; + + return ret; } static const VMStateDescription vmstate_iommu = { @@ -354,6 +350,11 @@ static void iommu_init(Object *obj) IOMMUState *s = SUN4M_IOMMU(obj); SysBusDevice *dev = SYS_BUS_DEVICE(obj); + memory_region_init_iommu(&s->iommu, sizeof(s->iommu), + TYPE_SUN4M_IOMMU_MEMORY_REGION, OBJECT(dev), + "iommu-sun4m", UINT64_MAX); + address_space_init(&s->iommu_as, MEMORY_REGION(&s->iommu), "iommu-as"); + sysbus_init_irq(dev, &s->irq); memory_region_init_io(&s->iomem, obj, &iommu_mem_ops, s, "iommu", @@ -383,9 +384,23 @@ static const TypeInfo iommu_info = { .class_init = iommu_class_init, }; +static void sun4m_iommu_memory_region_class_init(ObjectClass *klass, void *data) +{ + IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_CLASS(klass); + + imrc->translate = sun4m_translate_iommu; +} + +static const TypeInfo sun4m_iommu_memory_region_info = { + .parent = TYPE_IOMMU_MEMORY_REGION, + .name = TYPE_SUN4M_IOMMU_MEMORY_REGION, + .class_init = sun4m_iommu_memory_region_class_init, +}; + static void iommu_register_types(void) { type_register_static(&iommu_info); + type_register_static(&sun4m_iommu_memory_region_info); } type_init(iommu_register_types) |