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authorMarcel Apfelbaum <marcel.a@redhat.com>2013-10-07 10:36:39 +0300
committerMichael S. Tsirkin <mst@redhat.com>2013-10-14 17:11:45 +0300
commit9e64f8a3fcc88a508990a62ecc5a1269e41272ad (patch)
treecc9461940fb228d4b0e8cf9b945785b374a5da41 /hw/display/qxl.c
parent68919cace8242363edfe8ff9b9c68b5e58c30db4 (diff)
hw: set interrupts using pci irq wrappers
pci_set_irq and the other pci irq wrappers use PCI_INTERRUPT_PIN config register to compute device INTx pin to assert/deassert. An irq is allocated using pci_allocate_irq wrapper only if is needed by non pci devices. Removed irq related fields from state if not used anymore. Signed-off-by: Marcel Apfelbaum <marcel.a@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Diffstat (limited to 'hw/display/qxl.c')
-rw-r--r--hw/display/qxl.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/hw/display/qxl.c b/hw/display/qxl.c
index c50e285e21..0e2231ce89 100644
--- a/hw/display/qxl.c
+++ b/hw/display/qxl.c
@@ -1103,7 +1103,7 @@ static void qxl_update_irq(PCIQXLDevice *d)
uint32_t pending = le32_to_cpu(d->ram->int_pending);
uint32_t mask = le32_to_cpu(d->ram->int_mask);
int level = !!(pending & mask);
- qemu_set_irq(d->pci.irq[0], level);
+ pci_set_irq(&d->pci, level);
qxl_ring_set_dirty(d);
}