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authorBALATON Zoltan <balaton@eik.bme.hu>2020-06-21 13:12:38 +0200
committerGerd Hoffmann <kraxel@redhat.com>2020-06-30 22:54:24 +0200
commit2bbcaa7cd67c30fc90d643f2fb490787b9d9627c (patch)
treea9f2b75bce8fb01632c32831f768507b6ce7d7fe /hw/display/ati.c
parent41977c65c04a85f177603778cb60e06847efd3af (diff)
ati-vga: Add dummy MEM_SDRAM_MODE_REG
Radeon chips have an SDRAM mode reg that is accessed by some drivers. We don't emulate the memory controller but provide some default value to prevent drivers getting unexpected 0. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Message-id: cc1324b9ef06beb8ae233ddc77dedd8bab9b8624.1592737958.git.balaton@eik.bme.hu Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Diffstat (limited to 'hw/display/ati.c')
-rw-r--r--hw/display/ati.c5
1 files changed, 5 insertions, 0 deletions
diff --git a/hw/display/ati.c b/hw/display/ati.c
index 95fc443cac..4c3ad8f47b 100644
--- a/hw/display/ati.c
+++ b/hw/display/ati.c
@@ -361,6 +361,11 @@ static uint64_t ati_mm_read(void *opaque, hwaddr addr, unsigned int size)
case MC_STATUS:
val = 5;
break;
+ case MEM_SDRAM_MODE_REG:
+ if (s->dev_id != PCI_DEVICE_ID_ATI_RAGE128_PF) {
+ val = BIT(28) | BIT(20);
+ }
+ break;
case RBBM_STATUS:
case GUI_STAT:
val = 64; /* free CMDFIFO entries */