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authorJonathan Cameron <Jonathan.Cameron@huawei.com>2022-06-16 15:51:24 +0100
committerMichael S. Tsirkin <mst@redhat.com>2022-06-16 12:54:57 -0400
commit638b752da30a9daffb0c92166937a0cb777f9e23 (patch)
treee85e72dd6e79802b479bb02d6c955e7deae13369 /hw/cxl
parentdef6fd6c9ce9e00a30cdd0066e0fde206b3f3d2f (diff)
pci-bridge/cxl_upstream: Add a CXL switch upstream port
An initial simple upstream port emulation to allow the creation of CXL switches. The Device ID has been allocated for this use. Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Message-Id: <20220616145126.8002-2-Jonathan.Cameron@huawei.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Diffstat (limited to 'hw/cxl')
0 files changed, 0 insertions, 0 deletions