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authorJonathan Cameron <Jonathan.Cameron@huawei.com>2022-08-08 13:20:51 +0100
committerMichael S. Tsirkin <mst@redhat.com>2022-08-17 13:08:11 -0400
commitd2289b524e71970ea8ca5602f219cc92b8e5896b (patch)
tree48fa641428d2e25a9e8a8449d572796ce8a3f428 /hw/cxl
parenta99fbb003b2558cb4ff426d8144eff7cc1e2d7dc (diff)
hw/cxl: Fix wrong query of target ports
Two issues were present in this code: 1) Check on which register to look in was inverted. 2) Both branches use the _LO register. Whilst here moved to extract32() rather than hand rolling the field extraction as simpler and hopefully less error prone. Fixes Coverity CID: 1488873 Reported-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Message-Id: <20220808122051.14822-3-Jonathan.Cameron@huawei.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Diffstat (limited to 'hw/cxl')
-rw-r--r--hw/cxl/cxl-host.c12
1 files changed, 5 insertions, 7 deletions
diff --git a/hw/cxl/cxl-host.c b/hw/cxl/cxl-host.c
index faa68ef038..1adf61231a 100644
--- a/hw/cxl/cxl-host.c
+++ b/hw/cxl/cxl-host.c
@@ -104,7 +104,6 @@ static bool cxl_hdm_find_target(uint32_t *cache_mem, hwaddr addr,
uint32_t ctrl;
uint32_t ig_enc;
uint32_t iw_enc;
- uint32_t target_reg;
uint32_t target_idx;
ctrl = cache_mem[R_CXL_HDM_DECODER0_CTRL];
@@ -116,14 +115,13 @@ static bool cxl_hdm_find_target(uint32_t *cache_mem, hwaddr addr,
iw_enc = FIELD_EX32(ctrl, CXL_HDM_DECODER0_CTRL, IW);
target_idx = (addr / cxl_decode_ig(ig_enc)) % (1 << iw_enc);
- if (target_idx > 4) {
- target_reg = cache_mem[R_CXL_HDM_DECODER0_TARGET_LIST_LO];
- target_reg >>= target_idx * 8;
+ if (target_idx < 4) {
+ *target = extract32(cache_mem[R_CXL_HDM_DECODER0_TARGET_LIST_LO],
+ target_idx * 8, 8);
} else {
- target_reg = cache_mem[R_CXL_HDM_DECODER0_TARGET_LIST_LO];
- target_reg >>= (target_idx - 4) * 8;
+ *target = extract32(cache_mem[R_CXL_HDM_DECODER0_TARGET_LIST_HI],
+ (target_idx - 4) * 8, 8);
}
- *target = target_reg & 0xff;
return true;
}