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authorEduardo Habkost <ehabkost@redhat.com>2020-09-03 16:43:22 -0400
committerEduardo Habkost <ehabkost@redhat.com>2020-09-09 09:26:43 -0400
commitdb1015e92e04835c9eb50c29625fe566d1202dbd (patch)
tree41fbc0bf3e3f29b7ecb339224a049e3f2a7db8fa /hw/cpu
parent1c8eef0227e2942264063f22f10a06b84e0d3fa9 (diff)
Move QOM typedefs and add missing includes
Some typedefs and macros are defined after the type check macros. This makes it difficult to automatically replace their definitions with OBJECT_DECLARE_TYPE. Patch generated using: $ ./scripts/codeconverter/converter.py -i \ --pattern=QOMStructTypedefSplit $(git grep -l '' -- '*.[ch]') which will split "typdef struct { ... } TypedefName" declarations. Followed by: $ ./scripts/codeconverter/converter.py -i --pattern=MoveSymbols \ $(git grep -l '' -- '*.[ch]') which will: - move the typedefs and #defines above the type check macros - add missing #include "qom/object.h" lines if necessary Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: Juan Quintela <quintela@redhat.com> Message-Id: <20200831210740.126168-9-ehabkost@redhat.com> Reviewed-by: Juan Quintela <quintela@redhat.com> Message-Id: <20200831210740.126168-10-ehabkost@redhat.com> Message-Id: <20200831210740.126168-11-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Diffstat (limited to 'hw/cpu')
-rw-r--r--hw/cpu/realview_mpcore.c6
1 files changed, 4 insertions, 2 deletions
diff --git a/hw/cpu/realview_mpcore.c b/hw/cpu/realview_mpcore.c
index 96f4d2517a..1f1df08cfa 100644
--- a/hw/cpu/realview_mpcore.c
+++ b/hw/cpu/realview_mpcore.c
@@ -15,15 +15,17 @@
#include "hw/intc/realview_gic.h"
#include "hw/irq.h"
#include "hw/qdev-properties.h"
+#include "qom/object.h"
#define TYPE_REALVIEW_MPCORE_RIRQ "realview_mpcore"
+typedef struct mpcore_rirq_state mpcore_rirq_state;
#define REALVIEW_MPCORE_RIRQ(obj) \
OBJECT_CHECK(mpcore_rirq_state, (obj), TYPE_REALVIEW_MPCORE_RIRQ)
/* Dummy PIC to route IRQ lines. The baseboard has 4 independent IRQ
controllers. The output of these, plus some of the raw input lines
are fed into a single SMP-aware interrupt controller on the CPU. */
-typedef struct {
+struct mpcore_rirq_state {
SysBusDevice parent_obj;
qemu_irq cpuic[32];
@@ -32,7 +34,7 @@ typedef struct {
ARM11MPCorePriveState priv;
RealViewGICState gic[4];
-} mpcore_rirq_state;
+};
/* Map baseboard IRQs onto CPU IRQ lines. */
static const int mpcore_irq_map[32] = {