diff options
| author | Michael S. Tsirkin <mst@redhat.com> | 2023-08-29 16:14:29 -0400 |
|---|---|---|
| committer | Michael S. Tsirkin <mst@redhat.com> | 2023-10-04 04:53:52 -0400 |
| commit | 4565917bb034479a29c04f0b44124e7f61585ccf (patch) | |
| tree | fe087c680bd572a2fdeafa343876177705ad0fdc /hw/core/machine.c | |
| parent | 494a6a2cf7f775d2c20fd6df9601e30606cc2014 (diff) | |
pci: SLT must be RO
current code sets PCI_SEC_LATENCY_TIMER to RW, but for
pcie to pcie bridges it must be RO 0 according to
pci express spec which says:
This register does not apply to PCI Express. It must be read-only
and hardwired to 00h. For PCI Express to PCI/PCI-X Bridges, refer to the
[PCIe-to-PCI-PCI-X-Bridge] for requirements for this register.
also, fix typo in comment where it's made writeable - this typo
is likely what prevented us noticing we violate this requirement
in the 1st place.
Reported-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
Message-Id: <de9d05366a70172e1789d10591dbe59e39c3849c.1693432039.git.mst@redhat.com>
Tested-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Diffstat (limited to 'hw/core/machine.c')
| -rw-r--r-- | hw/core/machine.c | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/hw/core/machine.c b/hw/core/machine.c index cb38b8cf4c..9ae8f793ae 100644 --- a/hw/core/machine.c +++ b/hw/core/machine.c @@ -32,6 +32,7 @@ #include "qemu/error-report.h" #include "sysemu/qtest.h" #include "hw/pci/pci.h" +#include "hw/pci/pci_bridge.h" #include "hw/mem/nvdimm.h" #include "migration/global_state.h" #include "migration/vmstate.h" @@ -40,7 +41,9 @@ #include "hw/virtio/virtio-pci.h" #include "hw/virtio/virtio-net.h" -GlobalProperty hw_compat_8_1[] = {}; +GlobalProperty hw_compat_8_1[] = { + { TYPE_PCI_BRIDGE, "x-pci-express-writeable-slt-bug", "true" }, +}; const size_t hw_compat_8_1_len = G_N_ELEMENTS(hw_compat_8_1); GlobalProperty hw_compat_8_0[] = { |