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authorHans-Erik Floryd <hans-erik.floryd@rt-labs.com>2023-10-30 16:15:17 +0100
committerPeter Maydell <peter.maydell@linaro.org>2023-11-02 13:36:45 +0000
commit2e9cb201a8ad00b8b5eda98260aadabd1fdd0b82 (patch)
treecf205ff009e0dd2299825a33647b63947a2e8968 /hw/char
parentb80e20dbbfe4b1c609493a591c151407de8ee1bd (diff)
hw/char/stm32f2xx_usart: Update IRQ when DR is written
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Hans-Erik Floryd <hans-erik.floryd@rt-labs.com> Message-id: 20231030151528.1138131-3-hans-erik.floryd@rt-labs.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/char')
-rw-r--r--hw/char/stm32f2xx_usart.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/hw/char/stm32f2xx_usart.c b/hw/char/stm32f2xx_usart.c
index 519d3461a3..8753afeb2b 100644
--- a/hw/char/stm32f2xx_usart.c
+++ b/hw/char/stm32f2xx_usart.c
@@ -168,6 +168,7 @@ static void stm32f2xx_usart_write(void *opaque, hwaddr addr,
clear TC by writing 0 to the SR register, so set it again
on each write. */
s->usart_sr |= USART_SR_TC;
+ stm32f2xx_update_irq(s);
}
return;
case USART_BRR: