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| author | Peter Maydell <peter.maydell@linaro.org> | 2016-06-06 17:02:42 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2016-06-06 17:02:42 +0100 |
| commit | 76462405809d29bab65a3699686998ba124ab942 (patch) | |
| tree | a00c97255db11fc654c09349c06fc3581b872e02 /hw/char/xilinx_uartlite.c | |
| parent | 280b2358cd1fc88003773bff3c4d4219f8bd3ae6 (diff) | |
| parent | 0c18c6c67e06859ef354b697cce567ebe29061f1 (diff) | |
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20160606-1' into staging
target-arm queue:
* support instruction syndrome info for data aborts from A64 to EL2
* add HSTR_EL2 register
* fix incorrect ESR IL bits in various syndrome register cases
* virt: fix limit of 64-bit ACPI/ECAM PCI MMIO range
* gicv2: RAZ/WI non-sec access to sec interrupts
* i2c: add aspeed i2c controller
* virt: Reject gic-version=host for non-KVM (don't segv on aarch64 host)
* xlnx-zynqmp: Add a secure prop to en/disable ARM Security Extensions
* xlnx-zynqmp: Support KVM on AArch64 hosts
* ptimer: Various fixes for awkward corner cases
* char: QOMify various ARM UART models
* char: get rid of qemu_char_get_next_serial
* target-arm: Fix TTBR selecting logic on AArch32 Stage 2 translation
* zynqmp: Add the ZCU102 board
# gpg: Signature made Mon 06 Jun 2016 17:01:11 BST
# gpg: using RSA key 0x3C2525ED14360CDE
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>"
# gpg: aka "Peter Maydell <pmaydell@gmail.com>"
# gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>"
* remotes/pmaydell/tags/pull-target-arm-20160606-1: (25 commits)
zynqmp: Add the ZCU102 board
target-arm: Fix TTBR selecting logic on AArch32 Stage 2 translation
char: get rid of qemu_char_get_next_serial
hw/char: QOM'ify xilinx_uartlite model
hw/char: QOM'ify stm32f2xx_usart model
hw/char: QOM'ify digic-uart model
hw/char: QOM'ify cadence_uart model
hw/char: QOM'ify pl011 model
hw/ptimer: Introduce ptimer_get_limit
hw/ptimer: Support "on the fly" timer mode switch
hw/ptimer: Update .delta on period/freq change
hw/ptimer: Perform counter wrap around if timer already expired
hw/ptimer: Fix issues caused by the adjusted timer limit value
xlnx-zynqmp: Use the in kernel GIC model for KVM runs
xlnx-zynqmp: Delay realization of GIC until post CPU realization
xlnx-zynqmp: Make the RPU subsystem optional
xlnx-zynqmp: Add a secure prop to en/disable ARM Security Extensions
hw/arm/virt: Reject gic-version=host for non-KVM
i2c: add aspeed i2c controller
hw/intc/gic: RAZ/WI non-sec access to sec interrupts
...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/char/xilinx_uartlite.c')
| -rw-r--r-- | hw/char/xilinx_uartlite.c | 10 |
1 files changed, 6 insertions, 4 deletions
diff --git a/hw/char/xilinx_uartlite.c b/hw/char/xilinx_uartlite.c index 911af4a0d7..4847efb29f 100644 --- a/hw/char/xilinx_uartlite.c +++ b/hw/char/xilinx_uartlite.c @@ -172,6 +172,11 @@ static const MemoryRegionOps uart_ops = { } }; +static Property xilinx_uartlite_properties[] = { + DEFINE_PROP_CHR("chardev", XilinxUARTLite, chr), + DEFINE_PROP_END_OF_LIST(), +}; + static void uart_rx(void *opaque, const uint8_t *buf, int size) { XilinxUARTLite *s = opaque; @@ -206,8 +211,6 @@ static void xilinx_uartlite_realize(DeviceState *dev, Error **errp) { XilinxUARTLite *s = XILINX_UARTLITE(dev); - /* FIXME use a qdev chardev prop instead of qemu_char_get_next_serial() */ - s->chr = qemu_char_get_next_serial(); if (s->chr) qemu_chr_add_handlers(s->chr, uart_can_rx, uart_rx, uart_event, s); } @@ -229,8 +232,7 @@ static void xilinx_uartlite_class_init(ObjectClass *klass, void *data) dc->reset = xilinx_uartlite_reset; dc->realize = xilinx_uartlite_realize; - /* Reason: realize() method uses qemu_char_get_next_serial() */ - dc->cannot_instantiate_with_device_add_yet = true; + dc->props = xilinx_uartlite_properties; } static const TypeInfo xilinx_uartlite_info = { |