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authorPaolo Bonzini <pbonzini@redhat.com>2014-12-22 08:51:57 +0100
committerPaolo Bonzini <pbonzini@redhat.com>2015-01-03 09:22:12 +0100
commitbfa7362889d05d6951493d1c298289b39cf9bf86 (patch)
tree11ea4735309b6a4dea2b0f150990908a52a4175e /hw/char/serial.c
parentcd42d5b23691ad73edfd6dbcfc935a960a9c5a65 (diff)
serial: refine serial_thr_ipending_needed
If the THR interrupt is disabled, there is no need to migrate thr_ipending because LSR.THRE will be sampled again when the interrupt is enabled. (This is the behavior that is not documented in the datasheet, but relied on by Windows!) Note that in this case IIR will never be 0x2 so, if thr_ipending were to be one, QEMU would produce the subsection. Reported-by: Igor Mammedov <imammedo@redhat.com> Cc: qemu-stable@nongnu.org Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'hw/char/serial.c')
-rw-r--r--hw/char/serial.c13
1 files changed, 11 insertions, 2 deletions
diff --git a/hw/char/serial.c b/hw/char/serial.c
index 6d522ff4f3..3aca87416d 100644
--- a/hw/char/serial.c
+++ b/hw/char/serial.c
@@ -645,8 +645,17 @@ static int serial_post_load(void *opaque, int version_id)
static bool serial_thr_ipending_needed(void *opaque)
{
SerialState *s = opaque;
- bool expected_value = ((s->iir & UART_IIR_ID) == UART_IIR_THRI);
- return s->thr_ipending != expected_value;
+
+ if (s->ier & UART_IER_THRI) {
+ bool expected_value = ((s->iir & UART_IIR_ID) == UART_IIR_THRI);
+ return s->thr_ipending != expected_value;
+ } else {
+ /* LSR.THRE will be sampled again when the interrupt is
+ * enabled. thr_ipending is not used in this case, do
+ * not migrate it.
+ */
+ return false;
+ }
}
const VMStateDescription vmstate_serial_thr_ipending = {