aboutsummaryrefslogtreecommitdiff
path: root/hw/char/escc.c
diff options
context:
space:
mode:
authorMarc-André Lureau <marcandre.lureau@redhat.com>2016-10-22 12:52:51 +0300
committerPaolo Bonzini <pbonzini@redhat.com>2016-10-24 15:27:20 +0200
commitbecdfa00cfa2995e859ccefa4b7d72a72eb96581 (patch)
tree8973236c181dcde0dbcd9fd36d122fc7a4bac6d7 /hw/char/escc.c
parentecb672d14f092f481000ac9cd9d7dc0500692eba (diff)
char: replace PROP_CHR with CharBackend
Store the property in a CharBackend instead of CharDriverState*. This also replace systematically chr by chr.chr to access the CharDriverState*. The following patches will replace it with calls to qemu_chr_fe CharBackend functions. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Message-Id: <20161022095318.17775-12-marcandre.lureau@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'hw/char/escc.c')
-rw-r--r--hw/char/escc.c21
1 files changed, 11 insertions, 10 deletions
diff --git a/hw/char/escc.c b/hw/char/escc.c
index aa1739762b..ae69b392a4 100644
--- a/hw/char/escc.c
+++ b/hw/char/escc.c
@@ -88,7 +88,7 @@ typedef struct ChannelState {
uint32_t reg;
uint8_t wregs[SERIAL_REGS], rregs[SERIAL_REGS];
SERIOQueue queue;
- CharDriverState *chr;
+ CharBackend chr;
int e0_mode, led_mode, caps_lock_mode, num_lock_mode;
int disabled;
int clock;
@@ -416,7 +416,7 @@ static void escc_update_parameters(ChannelState *s)
int speed, parity, data_bits, stop_bits;
QEMUSerialSetParams ssp;
- if (!s->chr || s->type != ser)
+ if (!s->chr.chr || s->type != ser)
return;
if (s->wregs[W_TXCTRL1] & TXCTRL1_PAREN) {
@@ -466,7 +466,7 @@ static void escc_update_parameters(ChannelState *s)
ssp.data_bits = data_bits;
ssp.stop_bits = stop_bits;
trace_escc_update_parameters(CHN_C(s), speed, parity, data_bits, stop_bits);
- qemu_chr_fe_ioctl(s->chr, CHR_IOCTL_SERIAL_SET_PARAMS, &ssp);
+ qemu_chr_fe_ioctl(s->chr.chr, CHR_IOCTL_SERIAL_SET_PARAMS, &ssp);
}
static void escc_mem_write(void *opaque, hwaddr addr,
@@ -556,11 +556,11 @@ static void escc_mem_write(void *opaque, hwaddr addr,
trace_escc_mem_writeb_data(CHN_C(s), val);
s->tx = val;
if (s->wregs[W_TXCTRL2] & TXCTRL2_TXEN) { // tx enabled
- if (s->chr)
+ if (s->chr.chr) {
/* XXX this blocks entire thread. Rewrite to use
* qemu_chr_fe_write and background I/O callbacks */
- qemu_chr_fe_write_all(s->chr, &s->tx, 1);
- else if (s->type == kbd && !s->disabled) {
+ qemu_chr_fe_write_all(s->chr.chr, &s->tx, 1);
+ } else if (s->type == kbd && !s->disabled) {
handle_kbd_command(s, val);
}
}
@@ -599,8 +599,9 @@ static uint64_t escc_mem_read(void *opaque, hwaddr addr,
else
ret = s->rx;
trace_escc_mem_readb_data(CHN_C(s), ret);
- if (s->chr)
- qemu_chr_accept_input(s->chr);
+ if (s->chr.chr) {
+ qemu_chr_accept_input(s->chr.chr);
+ }
return ret;
default:
break;
@@ -1013,9 +1014,9 @@ static void escc_realize(DeviceState *dev, Error **errp)
ESCC_SIZE << s->it_shift);
for (i = 0; i < 2; i++) {
- if (s->chn[i].chr) {
+ if (s->chn[i].chr.chr) {
s->chn[i].clock = s->frequency / 2;
- qemu_chr_add_handlers(s->chn[i].chr, serial_can_receive,
+ qemu_chr_add_handlers(s->chn[i].chr.chr, serial_can_receive,
serial_receive1, serial_event, &s->chn[i]);
}
}