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authorKlaus Jensen <k.jensen@samsung.com>2020-12-18 13:04:19 +0100
committerKlaus Jensen <k.jensen@samsung.com>2021-02-08 21:15:53 +0100
commit75c3c9de961db9a76842452c973aea921eb4fa1f (patch)
treee22c52d5071a6d3a09a2d29b935b69ec62169c10 /hw/block
parentb78b9bb0ee1f07b27b649065158dcac571986f30 (diff)
hw/block/nvme: disable PMR at boot up
The PMR should not be enabled at boot up. Disable the PMR MemoryRegion initially and implement MMIO for PMRCTL, allowing the host to enable the PMR explicitly. Reviewed-by: Keith Busch <kbusch@kernel.org> Signed-off-by: Klaus Jensen <k.jensen@samsung.com>
Diffstat (limited to 'hw/block')
-rw-r--r--hw/block/nvme.c14
1 files changed, 12 insertions, 2 deletions
diff --git a/hw/block/nvme.c b/hw/block/nvme.c
index f8dd771925..d773796051 100644
--- a/hw/block/nvme.c
+++ b/hw/block/nvme.c
@@ -3848,8 +3848,16 @@ static void nvme_write_bar(NvmeCtrl *n, hwaddr offset, uint64_t data,
NVME_GUEST_ERR(pci_nvme_ub_mmiowr_pmrcap_readonly,
"invalid write to PMRCAP register, ignored");
return;
- case 0xE04: /* TODO PMRCTL */
- break;
+ case 0xE04: /* PMRCTL */
+ n->bar.pmrctl = data;
+ if (NVME_PMRCTL_EN(data)) {
+ memory_region_set_enabled(&n->pmrdev->mr, true);
+ n->bar.pmrsts = 0;
+ } else {
+ memory_region_set_enabled(&n->pmrdev->mr, false);
+ NVME_PMRSTS_SET_NRDY(n->bar.pmrsts, 1);
+ }
+ return;
case 0xE08: /* PMRSTS */
NVME_GUEST_ERR(pci_nvme_ub_mmiowr_pmrsts_readonly,
"invalid write to PMRSTS register, ignored");
@@ -4225,6 +4233,8 @@ static void nvme_init_pmr(NvmeCtrl *n, PCIDevice *pci_dev)
PCI_BASE_ADDRESS_SPACE_MEMORY |
PCI_BASE_ADDRESS_MEM_TYPE_64 |
PCI_BASE_ADDRESS_MEM_PREFETCH, &n->pmrdev->mr);
+
+ memory_region_set_enabled(&n->pmrdev->mr, false);
}
static int nvme_init_pci(NvmeCtrl *n, PCIDevice *pci_dev, Error **errp)