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authorStephen Checkoway <stephen.checkoway@oberlin.edu>2019-04-26 12:26:24 -0400
committerPhilippe Mathieu-Daudé <philmd@redhat.com>2019-07-02 02:34:55 +0200
commit80f2c625cbd67447a750c0c6c5d377dfa65d4d7d (patch)
treeb1b6632bde06ff580897e84e5acb3e1471773ab5 /hw/block
parentddb6f2254871c7c686561c4b41d52e2f0413f9a1 (diff)
hw/block/pflash_cfi02: Use chip erase time specified in the CFI table
When erasing the chip, use the typical time specified in the CFI table rather than arbitrarily selecting 5 seconds. Since the currently unconfigurable value set in the table is 12, this means a chip erase takes 4096 ms so this isn't a big change in behavior. Signed-off-by: Stephen Checkoway <stephen.checkoway@oberlin.edu> Message-Id: <20190426162624.55977-11-stephen.checkoway@oberlin.edu> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Diffstat (limited to 'hw/block')
-rw-r--r--hw/block/pflash_cfi02.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/hw/block/pflash_cfi02.c b/hw/block/pflash_cfi02.c
index a3665da3b8..b2d37c33bb 100644
--- a/hw/block/pflash_cfi02.c
+++ b/hw/block/pflash_cfi02.c
@@ -617,9 +617,9 @@ static void pflash_write(void *opaque, hwaddr offset, uint64_t value,
pflash_update(pfl, 0, pfl->chip_len);
}
set_dq7(pfl, 0x00);
- /* Let's wait 5 seconds before chip erase is done */
+ /* Wait the time specified at CFI address 0x22. */
timer_mod(&pfl->timer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) +
- (NANOSECONDS_PER_SECOND * 5));
+ (1ULL << pfl->cfi_table[0x22]) * SCALE_MS);
break;
case 0x30:
/* Sector erase */