diff options
| author | Gollu Appalanaidu <anaidu.gollu@samsung.com> | 2020-10-19 12:41:31 +0530 |
|---|---|---|
| committer | Klaus Jensen <k.jensen@samsung.com> | 2020-10-27 11:29:25 +0100 |
| commit | 28fee5b5d02d59a2b039c71a0a72292b1bc7f75b (patch) | |
| tree | 5c905de76cc0640f0c76724d540347d835f1dc7b /hw/block/trace-events | |
| parent | b865cabf735be793789ad2c7eac97f47a1325966 (diff) | |
hw/block/nvme: fix prp mapping status codes
Address 0 is not an invalid address. Remove those invalikd checks.
Unaligned PRP2 and PRP list entries should result in Invalid PRP Offset
status code and not Invalid Field. Fix that.
See NVMe Express v1.3d, Section 4.3 ("Physical Region Page Entry and
List").
Suggested-by: Keith Busch <kbusch@kernel.org>
Signed-off-by: Gollu Appalanaidu <anaidu.gollu@samsung.com>
Signed-off-by: Klaus Jensen <k.jensen@samsung.com>
Reviewed-by: Keith Busch <kbusch@kernel.org>
Diffstat (limited to 'hw/block/trace-events')
| -rw-r--r-- | hw/block/trace-events | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/hw/block/trace-events b/hw/block/trace-events index cab9913b1f..c1537e3ac0 100644 --- a/hw/block/trace-events +++ b/hw/block/trace-events @@ -97,10 +97,8 @@ pci_nvme_err_invalid_sgld(uint16_t cid, uint8_t typ) "cid %"PRIu16" type 0x%"PRI pci_nvme_err_invalid_num_sgld(uint16_t cid, uint8_t typ) "cid %"PRIu16" type 0x%"PRIx8"" pci_nvme_err_invalid_sgl_excess_length(uint16_t cid) "cid %"PRIu16"" pci_nvme_err_invalid_dma(void) "PRP/SGL is too small for transfer size" -pci_nvme_err_invalid_prplist_ent(uint64_t prplist) "PRP list entry is null or not page aligned: 0x%"PRIx64"" +pci_nvme_err_invalid_prplist_ent(uint64_t prplist) "PRP list entry is not page aligned: 0x%"PRIx64"" pci_nvme_err_invalid_prp2_align(uint64_t prp2) "PRP2 is not page aligned: 0x%"PRIx64"" -pci_nvme_err_invalid_prp2_missing(void) "PRP2 is null and more data to be transferred" -pci_nvme_err_invalid_prp(void) "invalid PRP" pci_nvme_err_invalid_opc(uint8_t opc) "invalid opcode 0x%"PRIx8"" pci_nvme_err_invalid_admin_opc(uint8_t opc) "invalid admin opcode 0x%"PRIx8"" pci_nvme_err_invalid_lba_range(uint64_t start, uint64_t len, uint64_t limit) "Invalid LBA start=%"PRIu64" len=%"PRIu64" limit=%"PRIu64"" |