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authorKlaus Jensen <k.jensen@samsung.com>2019-06-26 08:51:06 +0200
committerKlaus Jensen <k.jensen@samsung.com>2020-10-27 07:24:47 +0100
commit7f0f1acedf159d00684d495d7a14d52220c1d16b (patch)
tree1dc8557a7ebdf56c5f664b0898b3ab8d40a6ed3a /hw/block/nvme.c
parent7c9c350c15289b601766c391024e0bfea8a36ee0 (diff)
hw/block/nvme: support multiple namespaces
This adds support for multiple namespaces by introducing a new 'nvme-ns' device model. The nvme device creates a bus named from the device name ('id'). The nvme-ns devices then connect to this and registers themselves with the nvme device. This changes how an nvme device is created. Example with two namespaces: -drive file=nvme0n1.img,if=none,id=disk1 -drive file=nvme0n2.img,if=none,id=disk2 -device nvme,serial=deadbeef,id=nvme0 -device nvme-ns,drive=disk1,bus=nvme0,nsid=1 -device nvme-ns,drive=disk2,bus=nvme0,nsid=2 The drive property is kept on the nvme device to keep the change backward compatible, but the property is now optional. Specifying a drive for the nvme device will always create the namespace with nsid 1. Signed-off-by: Klaus Jensen <k.jensen@samsung.com> Reviewed-by: Keith Busch <kbusch@kernel.org> Reviewed-by: Minwoo Im <minwoo.im.dev@gmail.com>
Diffstat (limited to 'hw/block/nvme.c')
-rw-r--r--hw/block/nvme.c245
1 files changed, 160 insertions, 85 deletions
diff --git a/hw/block/nvme.c b/hw/block/nvme.c
index 924279d602..1af12f861a 100644
--- a/hw/block/nvme.c
+++ b/hw/block/nvme.c
@@ -17,12 +17,13 @@
/**
* Usage: add options:
* -drive file=<file>,if=none,id=<drive_id>
- * -device nvme,drive=<drive_id>,serial=<serial>,id=<id[optional]>, \
+ * -device nvme,serial=<serial>,id=<bus_name>, \
* cmb_size_mb=<cmb_size_mb[optional]>, \
* [pmrdev=<mem_backend_file_id>,] \
* max_ioqpairs=<N[optional]>, \
* aerl=<N[optional]>, aer_max_queued=<N[optional]>, \
* mdts=<N[optional]>
+ * -device nvme-ns,drive=<drive_id>,bus=bus_name,nsid=<nsid>
*
* Note cmb_size_mb denotes size of CMB in MB. CMB is assumed to be at
* offset 0 in BAR2 and supports only WDS, RDS and SQS for now.
@@ -69,6 +70,7 @@
#include "qemu/cutils.h"
#include "trace.h"
#include "nvme.h"
+#include "nvme-ns.h"
#define NVME_MAX_IOQPAIRS 0xffff
#define NVME_DB_SIZE 4
@@ -155,6 +157,11 @@ static int nvme_addr_read(NvmeCtrl *n, hwaddr addr, void *buf, int size)
return pci_dma_read(&n->parent_obj, addr, buf, size);
}
+static bool nvme_nsid_valid(NvmeCtrl *n, uint32_t nsid)
+{
+ return nsid && (nsid == NVME_NSID_BROADCAST || nsid <= n->num_namespaces);
+}
+
static int nvme_check_sqid(NvmeCtrl *n, uint16_t sqid)
{
return sqid < n->params.max_ioqpairs + 1 && n->sq[sqid] != NULL ? 0 : -1;
@@ -878,9 +885,9 @@ static inline uint16_t nvme_check_bounds(NvmeCtrl *n, NvmeNamespace *ns,
static void nvme_rw_cb(void *opaque, int ret)
{
NvmeRequest *req = opaque;
- NvmeCtrl *n = nvme_ctrl(req);
+ NvmeNamespace *ns = req->ns;
- BlockBackend *blk = n->conf.blk;
+ BlockBackend *blk = ns->blkconf.blk;
BlockAcctCookie *acct = &req->acct;
BlockAcctStats *stats = blk_get_stats(blk);
@@ -980,7 +987,8 @@ static uint16_t nvme_do_aio(BlockBackend *blk, int64_t offset, size_t len,
static uint16_t nvme_flush(NvmeCtrl *n, NvmeRequest *req)
{
- return nvme_do_aio(n->conf.blk, 0, 0, req);
+ NvmeNamespace *ns = req->ns;
+ return nvme_do_aio(ns->blkconf.blk, 0, 0, req);
}
static uint16_t nvme_write_zeroes(NvmeCtrl *n, NvmeRequest *req)
@@ -993,7 +1001,7 @@ static uint16_t nvme_write_zeroes(NvmeCtrl *n, NvmeRequest *req)
uint32_t count = nvme_l2b(ns, nlb);
uint16_t status;
- trace_pci_nvme_write_zeroes(nvme_cid(req), slba, nlb);
+ trace_pci_nvme_write_zeroes(nvme_cid(req), nvme_nsid(ns), slba, nlb);
status = nvme_check_bounds(n, ns, slba, nlb);
if (status) {
@@ -1001,7 +1009,7 @@ static uint16_t nvme_write_zeroes(NvmeCtrl *n, NvmeRequest *req)
return status;
}
- return nvme_do_aio(n->conf.blk, offset, count, req);
+ return nvme_do_aio(ns->blkconf.blk, offset, count, req);
}
static uint16_t nvme_rw(NvmeCtrl *n, NvmeRequest *req)
@@ -1017,8 +1025,8 @@ static uint16_t nvme_rw(NvmeCtrl *n, NvmeRequest *req)
BLOCK_ACCT_WRITE : BLOCK_ACCT_READ;
uint16_t status;
- trace_pci_nvme_rw(nvme_cid(req), nvme_io_opc_str(rw->opcode), nlb,
- data_size, slba);
+ trace_pci_nvme_rw(nvme_cid(req), nvme_io_opc_str(rw->opcode),
+ nvme_nsid(ns), nlb, data_size, slba);
status = nvme_check_mdts(n, data_size);
if (status) {
@@ -1037,10 +1045,10 @@ static uint16_t nvme_rw(NvmeCtrl *n, NvmeRequest *req)
goto invalid;
}
- return nvme_do_aio(n->conf.blk, data_offset, data_size, req);
+ return nvme_do_aio(ns->blkconf.blk, data_offset, data_size, req);
invalid:
- block_acct_invalid(blk_get_stats(n->conf.blk), acct);
+ block_acct_invalid(blk_get_stats(ns->blkconf.blk), acct);
return status;
}
@@ -1051,12 +1059,15 @@ static uint16_t nvme_io_cmd(NvmeCtrl *n, NvmeRequest *req)
trace_pci_nvme_io_cmd(nvme_cid(req), nsid, nvme_sqid(req),
req->cmd.opcode, nvme_io_opc_str(req->cmd.opcode));
- if (unlikely(nsid == 0 || nsid > n->num_namespaces)) {
- trace_pci_nvme_err_invalid_ns(nsid, n->num_namespaces);
+ if (!nvme_nsid_valid(n, nsid)) {
return NVME_INVALID_NSID | NVME_DNR;
}
- req->ns = &n->namespaces[nsid - 1];
+ req->ns = nvme_ns(n, nsid);
+ if (unlikely(!req->ns)) {
+ return NVME_INVALID_FIELD | NVME_DNR;
+ }
+
switch (req->cmd.opcode) {
case NVME_CMD_FLUSH:
return nvme_flush(n, req);
@@ -1196,18 +1207,24 @@ static uint16_t nvme_smart_info(NvmeCtrl *n, uint8_t rae, uint32_t buf_len,
uint64_t units_read = 0, units_written = 0;
uint64_t read_commands = 0, write_commands = 0;
NvmeSmartLog smart;
- BlockAcctStats *s;
if (nsid && nsid != 0xffffffff) {
return NVME_INVALID_FIELD | NVME_DNR;
}
- s = blk_get_stats(n->conf.blk);
+ for (int i = 1; i <= n->num_namespaces; i++) {
+ NvmeNamespace *ns = nvme_ns(n, i);
+ if (!ns) {
+ continue;
+ }
- units_read = s->nr_bytes[BLOCK_ACCT_READ] >> BDRV_SECTOR_BITS;
- units_written = s->nr_bytes[BLOCK_ACCT_WRITE] >> BDRV_SECTOR_BITS;
- read_commands = s->nr_ops[BLOCK_ACCT_READ];
- write_commands = s->nr_ops[BLOCK_ACCT_WRITE];
+ BlockAcctStats *s = blk_get_stats(ns->blkconf.blk);
+
+ units_read += s->nr_bytes[BLOCK_ACCT_READ] >> BDRV_SECTOR_BITS;
+ units_written += s->nr_bytes[BLOCK_ACCT_WRITE] >> BDRV_SECTOR_BITS;
+ read_commands += s->nr_ops[BLOCK_ACCT_READ];
+ write_commands += s->nr_ops[BLOCK_ACCT_WRITE];
+ }
if (off > sizeof(smart)) {
return NVME_INVALID_FIELD | NVME_DNR;
@@ -1451,18 +1468,23 @@ static uint16_t nvme_identify_ns(NvmeCtrl *n, NvmeRequest *req)
{
NvmeNamespace *ns;
NvmeIdentify *c = (NvmeIdentify *)&req->cmd;
+ NvmeIdNs *id_ns, inactive = { 0 };
uint32_t nsid = le32_to_cpu(c->nsid);
trace_pci_nvme_identify_ns(nsid);
- if (unlikely(nsid == 0 || nsid > n->num_namespaces)) {
- trace_pci_nvme_err_invalid_ns(nsid, n->num_namespaces);
+ if (!nvme_nsid_valid(n, nsid) || nsid == NVME_NSID_BROADCAST) {
return NVME_INVALID_NSID | NVME_DNR;
}
- ns = &n->namespaces[nsid - 1];
+ ns = nvme_ns(n, nsid);
+ if (unlikely(!ns)) {
+ id_ns = &inactive;
+ } else {
+ id_ns = &ns->id_ns;
+ }
- return nvme_dma(n, (uint8_t *)&ns->id_ns, sizeof(ns->id_ns),
+ return nvme_dma(n, (uint8_t *)id_ns, sizeof(NvmeIdNs),
DMA_DIRECTION_FROM_DEVICE, req);
}
@@ -1489,7 +1511,7 @@ static uint16_t nvme_identify_nslist(NvmeCtrl *n, NvmeRequest *req)
list = g_malloc0(data_len);
for (int i = 1; i <= n->num_namespaces; i++) {
- if (i <= min_nsid) {
+ if (i <= min_nsid || !nvme_ns(n, i)) {
continue;
}
list[j++] = cpu_to_le32(i);
@@ -1507,7 +1529,6 @@ static uint16_t nvme_identify_ns_descr_list(NvmeCtrl *n, NvmeRequest *req)
{
NvmeIdentify *c = (NvmeIdentify *)&req->cmd;
uint32_t nsid = le32_to_cpu(c->nsid);
-
uint8_t list[NVME_IDENTIFY_DATA_SIZE];
struct data {
@@ -1521,11 +1542,14 @@ static uint16_t nvme_identify_ns_descr_list(NvmeCtrl *n, NvmeRequest *req)
trace_pci_nvme_identify_ns_descr_list(nsid);
- if (unlikely(nsid == 0 || nsid > n->num_namespaces)) {
- trace_pci_nvme_err_invalid_ns(nsid, n->num_namespaces);
+ if (!nvme_nsid_valid(n, nsid) || nsid == NVME_NSID_BROADCAST) {
return NVME_INVALID_NSID | NVME_DNR;
}
+ if (unlikely(!nvme_ns(n, nsid))) {
+ return NVME_INVALID_FIELD | NVME_DNR;
+ }
+
memset(list, 0x0, sizeof(list));
/*
@@ -1638,7 +1662,7 @@ static uint16_t nvme_get_feature(NvmeCtrl *n, NvmeRequest *req)
}
if (nvme_feature_cap[fid] & NVME_FEAT_CAP_NS) {
- if (!nsid || nsid > n->num_namespaces) {
+ if (!nvme_nsid_valid(n, nsid) || nsid == NVME_NSID_BROADCAST) {
/*
* The Reservation Notification Mask and Reservation Persistence
* features require a status code of Invalid Field in Command when
@@ -1648,6 +1672,10 @@ static uint16_t nvme_get_feature(NvmeCtrl *n, NvmeRequest *req)
*/
return NVME_INVALID_NSID | NVME_DNR;
}
+
+ if (!nvme_ns(n, nsid)) {
+ return NVME_INVALID_FIELD | NVME_DNR;
+ }
}
switch (sel) {
@@ -1685,7 +1713,7 @@ static uint16_t nvme_get_feature(NvmeCtrl *n, NvmeRequest *req)
return NVME_INVALID_FIELD | NVME_DNR;
case NVME_VOLATILE_WRITE_CACHE:
- result = blk_enable_write_cache(n->conf.blk);
+ result = n->features.vwc;
trace_pci_nvme_getfeat_vwcache(result ? "enabled" : "disabled");
goto out;
case NVME_ASYNCHRONOUS_EVENT_CONF:
@@ -1756,6 +1784,8 @@ static uint16_t nvme_set_feature_timestamp(NvmeCtrl *n, NvmeRequest *req)
static uint16_t nvme_set_feature(NvmeCtrl *n, NvmeRequest *req)
{
+ NvmeNamespace *ns;
+
NvmeCmd *cmd = &req->cmd;
uint32_t dw10 = le32_to_cpu(cmd->cdw10);
uint32_t dw11 = le32_to_cpu(cmd->cdw11);
@@ -1774,12 +1804,18 @@ static uint16_t nvme_set_feature(NvmeCtrl *n, NvmeRequest *req)
}
if (nvme_feature_cap[fid] & NVME_FEAT_CAP_NS) {
- if (!nsid || (nsid != NVME_NSID_BROADCAST &&
- nsid > n->num_namespaces)) {
- return NVME_INVALID_NSID | NVME_DNR;
+ if (nsid != NVME_NSID_BROADCAST) {
+ if (!nvme_nsid_valid(n, nsid)) {
+ return NVME_INVALID_NSID | NVME_DNR;
+ }
+
+ ns = nvme_ns(n, nsid);
+ if (unlikely(!ns)) {
+ return NVME_INVALID_FIELD | NVME_DNR;
+ }
}
} else if (nsid && nsid != NVME_NSID_BROADCAST) {
- if (nsid > n->num_namespaces) {
+ if (!nvme_nsid_valid(n, nsid)) {
return NVME_INVALID_NSID | NVME_DNR;
}
@@ -1817,12 +1853,23 @@ static uint16_t nvme_set_feature(NvmeCtrl *n, NvmeRequest *req)
break;
case NVME_VOLATILE_WRITE_CACHE:
- if (!(dw11 & 0x1) && blk_enable_write_cache(n->conf.blk)) {
- blk_flush(n->conf.blk);
+ n->features.vwc = dw11 & 0x1;
+
+ for (int i = 1; i <= n->num_namespaces; i++) {
+ ns = nvme_ns(n, i);
+ if (!ns) {
+ continue;
+ }
+
+ if (!(dw11 & 0x1) && blk_enable_write_cache(ns->blkconf.blk)) {
+ blk_flush(ns->blkconf.blk);
+ }
+
+ blk_set_enable_write_cache(ns->blkconf.blk, dw11 & 1);
}
- blk_set_enable_write_cache(n->conf.blk, dw11 & 1);
break;
+
case NVME_NUMBER_OF_QUEUES:
if (n->qs_created) {
return NVME_CMD_SEQ_ERROR | NVME_DNR;
@@ -1944,9 +1991,17 @@ static void nvme_process_sq(void *opaque)
static void nvme_clear_ctrl(NvmeCtrl *n)
{
+ NvmeNamespace *ns;
int i;
- blk_drain(n->conf.blk);
+ for (i = 1; i <= n->num_namespaces; i++) {
+ ns = nvme_ns(n, i);
+ if (!ns) {
+ continue;
+ }
+
+ nvme_ns_drain(ns);
+ }
for (i = 0; i < n->params.max_ioqpairs + 1; i++) {
if (n->sq[i] != NULL) {
@@ -1969,7 +2024,15 @@ static void nvme_clear_ctrl(NvmeCtrl *n)
n->outstanding_aers = 0;
n->qs_created = false;
- blk_flush(n->conf.blk);
+ for (i = 1; i <= n->num_namespaces; i++) {
+ ns = nvme_ns(n, i);
+ if (!ns) {
+ continue;
+ }
+
+ nvme_ns_flush(ns);
+ }
+
n->bar.cc = 0;
}
@@ -2447,6 +2510,11 @@ static void nvme_check_constraints(NvmeCtrl *n, Error **errp)
params->max_ioqpairs = params->num_queues - 1;
}
+ if (n->conf.blk) {
+ warn_report("drive property is deprecated; "
+ "please use an nvme-ns device instead");
+ }
+
if (params->max_ioqpairs < 1 ||
params->max_ioqpairs > NVME_MAX_IOQPAIRS) {
error_setg(errp, "max_ioqpairs must be between 1 and %d",
@@ -2461,11 +2529,6 @@ static void nvme_check_constraints(NvmeCtrl *n, Error **errp)
return;
}
- if (!n->conf.blk) {
- error_setg(errp, "drive property not set");
- return;
- }
-
if (!params->serial) {
error_setg(errp, "serial property not set");
return;
@@ -2489,11 +2552,10 @@ static void nvme_check_constraints(NvmeCtrl *n, Error **errp)
static void nvme_init_state(NvmeCtrl *n)
{
- n->num_namespaces = 1;
+ n->num_namespaces = NVME_MAX_NAMESPACES;
/* add one to max_ioqpairs to account for the admin queue pair */
n->reg_size = pow2ceil(sizeof(NvmeBar) +
2 * (n->params.max_ioqpairs + 1) * NVME_DB_SIZE);
- n->namespaces = g_new0(NvmeNamespace, n->num_namespaces);
n->sq = g_new0(NvmeSQueue *, n->params.max_ioqpairs + 1);
n->cq = g_new0(NvmeCQueue *, n->params.max_ioqpairs + 1);
n->temperature = NVME_TEMPERATURE;
@@ -2502,34 +2564,41 @@ static void nvme_init_state(NvmeCtrl *n)
n->aer_reqs = g_new0(NvmeRequest *, n->params.aerl + 1);
}
-static void nvme_init_blk(NvmeCtrl *n, Error **errp)
+int nvme_register_namespace(NvmeCtrl *n, NvmeNamespace *ns, Error **errp)
{
- if (!blkconf_blocksizes(&n->conf, errp)) {
- return;
+ uint32_t nsid = nvme_nsid(ns);
+
+ if (nsid > NVME_MAX_NAMESPACES) {
+ error_setg(errp, "invalid namespace id (must be between 0 and %d)",
+ NVME_MAX_NAMESPACES);
+ return -1;
}
- blkconf_apply_backend_options(&n->conf, blk_is_read_only(n->conf.blk),
- false, errp);
-}
-static void nvme_init_namespace(NvmeCtrl *n, NvmeNamespace *ns, Error **errp)
-{
- int64_t bs_size;
- NvmeIdNs *id_ns = &ns->id_ns;
+ if (!nsid) {
+ for (int i = 1; i <= n->num_namespaces; i++) {
+ NvmeNamespace *ns = nvme_ns(n, i);
+ if (!ns) {
+ nsid = i;
+ break;
+ }
+ }
- bs_size = blk_getlength(n->conf.blk);
- if (bs_size < 0) {
- error_setg_errno(errp, -bs_size, "could not get backing file size");
- return;
+ if (!nsid) {
+ error_setg(errp, "no free namespace id");
+ return -1;
+ }
+ } else {
+ if (n->namespaces[nsid - 1]) {
+ error_setg(errp, "namespace id '%d' is already in use", nsid);
+ return -1;
+ }
}
- n->ns_size = bs_size;
+ trace_pci_nvme_register_namespace(nsid);
- id_ns->lbaf[0].ds = BDRV_SECTOR_BITS;
- id_ns->nsze = cpu_to_le64(nvme_ns_nlbas(n, ns));
+ n->namespaces[nsid - 1] = ns;
- /* no thin provisioning */
- id_ns->ncap = id_ns->nsze;
- id_ns->nuse = id_ns->ncap;
+ return 0;
}
static void nvme_init_cmb(NvmeCtrl *n, PCIDevice *pci_dev)
@@ -2671,6 +2740,8 @@ static void nvme_init_ctrl(NvmeCtrl *n, PCIDevice *pci_dev)
id->nn = cpu_to_le32(n->num_namespaces);
id->oncs = cpu_to_le16(NVME_ONCS_WRITE_ZEROES | NVME_ONCS_TIMESTAMP |
NVME_ONCS_FEATURES);
+
+ id->vwc = 0x1;
id->sgls = cpu_to_le32(NVME_CTRL_SGLS_SUPPORT_NO_ALIGN |
NVME_CTRL_SGLS_BITBUCKET);
@@ -2681,9 +2752,6 @@ static void nvme_init_ctrl(NvmeCtrl *n, PCIDevice *pci_dev)
id->psd[0].mp = cpu_to_le16(0x9c4);
id->psd[0].enlat = cpu_to_le32(0x10);
id->psd[0].exlat = cpu_to_le32(0x4);
- if (blk_enable_write_cache(n->conf.blk)) {
- id->vwc = 1;
- }
n->bar.cap = 0;
NVME_CAP_SET_MQES(n->bar.cap, 0x7ff);
@@ -2699,23 +2767,19 @@ static void nvme_init_ctrl(NvmeCtrl *n, PCIDevice *pci_dev)
static void nvme_realize(PCIDevice *pci_dev, Error **errp)
{
NvmeCtrl *n = NVME(pci_dev);
+ NvmeNamespace *ns;
Error *local_err = NULL;
- int i;
-
nvme_check_constraints(n, &local_err);
if (local_err) {
error_propagate(errp, local_err);
return;
}
- nvme_init_state(n);
- nvme_init_blk(n, &local_err);
- if (local_err) {
- error_propagate(errp, local_err);
- return;
- }
+ qbus_create_inplace(&n->bus, sizeof(NvmeBus), TYPE_NVME_BUS,
+ &pci_dev->qdev, n->parent_obj.qdev.id);
+ nvme_init_state(n);
nvme_init_pci(n, pci_dev, &local_err);
if (local_err) {
error_propagate(errp, local_err);
@@ -2724,10 +2788,12 @@ static void nvme_realize(PCIDevice *pci_dev, Error **errp)
nvme_init_ctrl(n, pci_dev);
- for (i = 0; i < n->num_namespaces; i++) {
- nvme_init_namespace(n, &n->namespaces[i], &local_err);
- if (local_err) {
- error_propagate(errp, local_err);
+ /* setup a namespace if the controller drive property was given */
+ if (n->namespace.blkconf.blk) {
+ ns = &n->namespace;
+ ns->params.nsid = 1;
+
+ if (nvme_ns_setup(n, ns, errp)) {
return;
}
}
@@ -2754,7 +2820,7 @@ static void nvme_exit(PCIDevice *pci_dev)
}
static Property nvme_props[] = {
- DEFINE_BLOCK_PROPERTIES(NvmeCtrl, conf),
+ DEFINE_BLOCK_PROPERTIES(NvmeCtrl, namespace.blkconf),
DEFINE_PROP_LINK("pmrdev", NvmeCtrl, pmrdev, TYPE_MEMORY_BACKEND,
HostMemoryBackend *),
DEFINE_PROP_STRING("serial", NvmeCtrl, params.serial),
@@ -2795,26 +2861,35 @@ static void nvme_instance_init(Object *obj)
{
NvmeCtrl *s = NVME(obj);
- device_add_bootindex_property(obj, &s->conf.bootindex,
- "bootindex", "/namespace@1,0",
- DEVICE(obj));
+ if (s->namespace.blkconf.blk) {
+ device_add_bootindex_property(obj, &s->namespace.blkconf.bootindex,
+ "bootindex", "/namespace@1,0",
+ DEVICE(obj));
+ }
}
static const TypeInfo nvme_info = {
.name = TYPE_NVME,
.parent = TYPE_PCI_DEVICE,
.instance_size = sizeof(NvmeCtrl),
- .class_init = nvme_class_init,
.instance_init = nvme_instance_init,
+ .class_init = nvme_class_init,
.interfaces = (InterfaceInfo[]) {
{ INTERFACE_PCIE_DEVICE },
{ }
},
};
+static const TypeInfo nvme_bus_info = {
+ .name = TYPE_NVME_BUS,
+ .parent = TYPE_BUS,
+ .instance_size = sizeof(NvmeBus),
+};
+
static void nvme_register_types(void)
{
type_register_static(&nvme_info);
+ type_register_static(&nvme_bus_info);
}
type_init(nvme_register_types)