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authorChristoph Hellwig <hch@lst.de>2015-06-11 12:01:39 +0200
committerKevin Wolf <kwolf@redhat.com>2015-07-14 15:55:19 +0200
commit30349fd038ffb26528fad21abe1e264031364449 (patch)
tree57e83cba4162fb8878cbc7747998deeed1a60bdf /hw/block/nvme.c
parent8b9d74e0eebb2106b767d66355d38086be72ad2b (diff)
nvme: properly report volatile write caches
Implement support in Identify and Get/Set Features to properly report and allow to change the Volatile Write Cache status reported by the virtual NVMe device. Signed-off-by: Christoph Hellwig <hch@lst.de> Acked-by: Keith Busch <keith.busch@intel.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com>
Diffstat (limited to 'hw/block/nvme.c')
-rw-r--r--hw/block/nvme.c19
1 files changed, 14 insertions, 5 deletions
diff --git a/hw/block/nvme.c b/hw/block/nvme.c
index dc9caf07fe..40d4880326 100644
--- a/hw/block/nvme.c
+++ b/hw/block/nvme.c
@@ -487,26 +487,32 @@ static uint16_t nvme_identify(NvmeCtrl *n, NvmeCmd *cmd)
static uint16_t nvme_get_feature(NvmeCtrl *n, NvmeCmd *cmd, NvmeRequest *req)
{
uint32_t dw10 = le32_to_cpu(cmd->cdw10);
+ uint32_t result;
switch (dw10) {
- case NVME_NUMBER_OF_QUEUES:
- req->cqe.result =
- cpu_to_le32((n->num_queues - 1) | ((n->num_queues - 1) << 16));
- break;
case NVME_VOLATILE_WRITE_CACHE:
- req->cqe.result = cpu_to_le32(1);
+ result = blk_enable_write_cache(n->conf.blk);
+ break;
+ case NVME_NUMBER_OF_QUEUES:
+ result = cpu_to_le32((n->num_queues - 1) | ((n->num_queues - 1) << 16));
break;
default:
return NVME_INVALID_FIELD | NVME_DNR;
}
+
+ req->cqe.result = result;
return NVME_SUCCESS;
}
static uint16_t nvme_set_feature(NvmeCtrl *n, NvmeCmd *cmd, NvmeRequest *req)
{
uint32_t dw10 = le32_to_cpu(cmd->cdw10);
+ uint32_t dw11 = le32_to_cpu(cmd->cdw11);
switch (dw10) {
+ case NVME_VOLATILE_WRITE_CACHE:
+ blk_set_enable_write_cache(n->conf.blk, dw11 & 1);
+ break;
case NVME_NUMBER_OF_QUEUES:
req->cqe.result =
cpu_to_le32((n->num_queues - 1) | ((n->num_queues - 1) << 16));
@@ -831,6 +837,9 @@ static int nvme_init(PCIDevice *pci_dev)
id->psd[0].mp = cpu_to_le16(0x9c4);
id->psd[0].enlat = cpu_to_le32(0x10);
id->psd[0].exlat = cpu_to_le32(0x4);
+ if (blk_enable_write_cache(n->conf.blk)) {
+ id->vwc = 1;
+ }
n->bar.cap = 0;
NVME_CAP_SET_MQES(n->bar.cap, 0x7ff);