diff options
| author | Stefan Hajnoczi <stefanha@redhat.com> | 2023-11-07 09:42:07 +0800 |
|---|---|---|
| committer | Stefan Hajnoczi <stefanha@redhat.com> | 2023-11-07 09:42:07 +0800 |
| commit | f6b174ff9652298eb037756407379dad764b9638 (patch) | |
| tree | 4dcbbfdfc220e8d999fdcf5710ada1e83bf40eb9 /hw/arm | |
| parent | bb59f3548f0df66689b3fef676b2ac29ca00973c (diff) | |
| parent | 5722fc471296d5f042df4b005a851cc8008df0c9 (diff) | |
Merge tag 'pull-target-arm-20231106' of https://git.linaro.org/people/pmaydell/qemu-arm into staging
target-arm queue:
* hw/arm/virt: fix PMU IRQ registration
* hw/arm/virt: Report correct register sizes in ACPI DBG2/SPCR tables
* hw/i386/intel_iommu: vtd_slpte_nonzero_rsvd(): assert no overflow
* util/filemonitor-inotify: qemu_file_monitor_watch(): assert no overflow
* mc146818rtc: rtc_set_time(): initialize tm to zeroes
* block/nvme: nvme_process_completion() fix bound for cid
* hw/core/loader: gunzip(): initialize z_stream
* io/channel-socket: qio_channel_socket_flush(): improve msg validation
* hw/arm/vexpress-a9: Remove useless mapping of RAM at address 0
* target/arm: Fix A64 LDRA immediate decode
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# gpg: Signature made Mon 06 Nov 2023 23:31:33 HKT
# gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE
# gpg: issuer "peter.maydell@linaro.org"
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [full]
# gpg: aka "Peter Maydell <pmaydell@gmail.com>" [full]
# gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [full]
# gpg: aka "Peter Maydell <peter@archaic.org.uk>" [unknown]
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE
* tag 'pull-target-arm-20231106' of https://git.linaro.org/people/pmaydell/qemu-arm:
target/arm: Fix A64 LDRA immediate decode
hw/arm/vexpress-a9: Remove useless mapping of RAM at address 0
io/channel-socket: qio_channel_socket_flush(): improve msg validation
hw/core/loader: gunzip(): initialize z_stream
block/nvme: nvme_process_completion() fix bound for cid
mc146818rtc: rtc_set_time(): initialize tm to zeroes
util/filemonitor-inotify: qemu_file_monitor_watch(): assert no overflow
hw/i386/intel_iommu: vtd_slpte_nonzero_rsvd(): assert no overflow
tests/qtest/bios-tables-test: Update virt SPCR and DBG2 golden references
hw/arm/virt: Report correct register sizes in ACPI DBG2/SPCR tables.
tests/qtest/bios-tables-test: Allow changes to virt SPCR and DBG2
hw/arm/virt: fix PMU IRQ registration
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Diffstat (limited to 'hw/arm')
| -rw-r--r-- | hw/arm/vexpress.c | 14 | ||||
| -rw-r--r-- | hw/arm/virt-acpi-build.c | 4 | ||||
| -rw-r--r-- | hw/arm/virt.c | 3 |
3 files changed, 7 insertions, 14 deletions
diff --git a/hw/arm/vexpress.c b/hw/arm/vexpress.c index 8ff37f52ca..c08ea34e92 100644 --- a/hw/arm/vexpress.c +++ b/hw/arm/vexpress.c @@ -177,7 +177,6 @@ struct VexpressMachineState { MemoryRegion vram; MemoryRegion sram; MemoryRegion flashalias; - MemoryRegion lowram; MemoryRegion a15sram; bool secure; bool virt; @@ -276,7 +275,6 @@ static void a9_daughterboard_init(VexpressMachineState *vms, { MachineState *machine = MACHINE(vms); MemoryRegion *sysmem = get_system_memory(); - ram_addr_t low_ram_size; if (ram_size > 0x40000000) { /* 1GB is the maximum the address space permits */ @@ -284,17 +282,11 @@ static void a9_daughterboard_init(VexpressMachineState *vms, exit(1); } - low_ram_size = ram_size; - if (low_ram_size > 0x4000000) { - low_ram_size = 0x4000000; - } - /* RAM is from 0x60000000 upwards. The bottom 64MB of the + /* + * RAM is from 0x60000000 upwards. The bottom 64MB of the * address space should in theory be remappable to various - * things including ROM or RAM; we always map the RAM there. + * things including ROM or RAM; we always map the flash there. */ - memory_region_init_alias(&vms->lowram, NULL, "vexpress.lowmem", - machine->ram, 0, low_ram_size); - memory_region_add_subregion(sysmem, 0x0, &vms->lowram); memory_region_add_subregion(sysmem, 0x60000000, machine->ram); /* 0x1e000000 A9MPCore (SCU) private memory region */ diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c index 9ce136cd88..8bc35a483c 100644 --- a/hw/arm/virt-acpi-build.c +++ b/hw/arm/virt-acpi-build.c @@ -482,7 +482,7 @@ build_spcr(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms) build_append_int_noprefix(table_data, 3, 1); /* ARM PL011 UART */ build_append_int_noprefix(table_data, 0, 3); /* Reserved */ /* Base Address */ - build_append_gas(table_data, AML_AS_SYSTEM_MEMORY, 8, 0, 1, + build_append_gas(table_data, AML_AS_SYSTEM_MEMORY, 32, 0, 3, vms->memmap[VIRT_UART].base); /* Interrupt Type */ build_append_int_noprefix(table_data, @@ -673,7 +673,7 @@ build_dbg2(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms) build_append_int_noprefix(table_data, 34, 2); /* BaseAddressRegister[] */ - build_append_gas(table_data, AML_AS_SYSTEM_MEMORY, 8, 0, 1, + build_append_gas(table_data, AML_AS_SYSTEM_MEMORY, 32, 0, 3, vms->memmap[VIRT_UART].base); /* AddressSize[] */ diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 92085d2d8f..0a16ab3095 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -631,7 +631,8 @@ static void fdt_add_pmu_nodes(const VirtMachineState *vms) qemu_fdt_setprop(ms->fdt, "/pmu", "compatible", compat, sizeof(compat)); qemu_fdt_setprop_cells(ms->fdt, "/pmu", "interrupts", - GIC_FDT_IRQ_TYPE_PPI, VIRTUAL_PMU_IRQ, irqflags); + GIC_FDT_IRQ_TYPE_PPI, + INTID_TO_PPI(VIRTUAL_PMU_IRQ), irqflags); } } |