diff options
author | Peter Maydell <peter.maydell@linaro.org> | 2021-02-19 14:45:43 +0000 |
---|---|---|
committer | Peter Maydell <peter.maydell@linaro.org> | 2021-03-08 17:20:01 +0000 |
commit | 446587a914cfa57c2ce529056a9ca2215bde7111 (patch) | |
tree | de79db22acd634631366e7a1728119f0b337fced /hw/arm | |
parent | c89cef3a2cdfb355258890db8cfd2175add5bbee (diff) |
hw/misc/iotkit-sysinfo.c: Implement SYS_CONFIG1 and IIDR
For SSE-300, the SYSINFO register block has two new registers:
* SYS_CONFIG1 indicates the config for a potential CPU2 and CPU3;
since the SSE-300 can only be configured with a single CPU it
is always zero
* IIDR is the subsystem implementation identity register;
its value is set by the SoC integrator, so we plumb this in from
the armsse.c code as we do with SYS_VERSION and SYS_CONFIG
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210219144617.4782-11-peter.maydell@linaro.org
Diffstat (limited to 'hw/arm')
-rw-r--r-- | hw/arm/armsse.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/hw/arm/armsse.c b/hw/arm/armsse.c index 113a783a46..326e161c8d 100644 --- a/hw/arm/armsse.c +++ b/hw/arm/armsse.c @@ -30,6 +30,7 @@ struct ARMSSEInfo { int sram_banks; int num_cpus; uint32_t sys_version; + uint32_t iidr; uint32_t cpuwait_rst; bool has_mhus; bool has_ppus; @@ -70,6 +71,7 @@ static const ARMSSEInfo armsse_variants[] = { .sram_banks = 1, .num_cpus = 1, .sys_version = 0x41743, + .iidr = 0, .cpuwait_rst = 0, .has_mhus = false, .has_ppus = false, @@ -84,6 +86,7 @@ static const ARMSSEInfo armsse_variants[] = { .sram_banks = 4, .num_cpus = 2, .sys_version = 0x22041743, + .iidr = 0, .cpuwait_rst = 2, .has_mhus = true, .has_ppus = true, @@ -950,6 +953,8 @@ static void armsse_realize(DeviceState *dev, Error **errp) } object_property_set_int(OBJECT(&s->sysinfo), "sse-version", info->sse_version, &error_abort); + object_property_set_int(OBJECT(&s->sysinfo), "IIDR", + info->iidr, &error_abort); if (!sysbus_realize(SYS_BUS_DEVICE(&s->sysinfo), errp)) { return; } |