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authorPhilippe Mathieu-Daudé <f4bug@amsat.org>2020-11-07 20:33:59 +0100
committerPeter Maydell <peter.maydell@linaro.org>2020-11-10 11:03:48 +0000
commit509602eed4d5d51cb71911ffc9c5ecc1cd04db06 (patch)
tree9fcb00d70beb3be6649041146bd3895a90d9b435 /hw/arm
parent604cef3e57eaeeef77074d78f6cf2eca1be11c62 (diff)
hw/arm/armsse: Correct expansion MPC interrupt lines
We can use one MPC per SRAM bank, but we currently only wire the IRQ from the first expansion MPC to the IRQ splitter. Fix that. Fixes: bb75e16d5e6 ("hw/arm/iotkit: Wire up MPC interrupt lines") Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20201107193403.436146-2-f4bug@amsat.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/arm')
-rw-r--r--hw/arm/armsse.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/hw/arm/armsse.c b/hw/arm/armsse.c
index a93da37dcb..baac027659 100644
--- a/hw/arm/armsse.c
+++ b/hw/arm/armsse.c
@@ -1074,7 +1074,8 @@ static void armsse_realize(DeviceState *dev, Error **errp)
qdev_get_gpio_in(dev_splitter, 0));
qdev_connect_gpio_out(dev_splitter, 0,
qdev_get_gpio_in_named(dev_secctl,
- "mpc_status", 0));
+ "mpc_status",
+ i - IOTS_NUM_EXP_MPC));
}
qdev_connect_gpio_out(dev_splitter, 1,