diff options
author | Cédric Le Goater <clg@kaod.org> | 2016-09-22 18:13:05 +0100 |
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committer | Peter Maydell <peter.maydell@linaro.org> | 2016-09-22 18:13:05 +0100 |
commit | 365aff1eaa370dc3bab2fb42b707496c46acb621 (patch) | |
tree | d4929391c9f12f403eee60c8501247c06abe0999 /hw/arm | |
parent | 8da33ef757d6d49b41432a22e4ab357652ec0e14 (diff) |
aspeed: add a ast2500 SoC and support to the SCU and SDMC controllers
Based on previous work done by Andrew Jeffery <andrew@aj.id.au>.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1473438177-26079-9-git-send-email-clg@kaod.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/arm')
-rw-r--r-- | hw/arm/aspeed_soc.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/hw/arm/aspeed_soc.c b/hw/arm/aspeed_soc.c index 07c9c90d7d..93bc7bb66e 100644 --- a/hw/arm/aspeed_soc.c +++ b/hw/arm/aspeed_soc.c @@ -38,10 +38,12 @@ static const int uart_irqs[] = { 9, 32, 33, 34, 10 }; static const int timer_irqs[] = { 16, 17, 18, 35, 36, 37, 38, 39, }; #define AST2400_SDRAM_BASE 0x40000000 +#define AST2500_SDRAM_BASE 0x80000000 static const AspeedSoCInfo aspeed_socs[] = { { "ast2400-a0", "arm926", AST2400_A0_SILICON_REV, AST2400_SDRAM_BASE }, { "ast2400", "arm926", AST2400_A0_SILICON_REV, AST2400_SDRAM_BASE }, + { "ast2500-a1", "arm1176", AST2500_A1_SILICON_REV, AST2500_SDRAM_BASE }, }; /* |