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authorEdgar E. Iglesias <edgar.iglesias@xilinx.com>2015-08-13 11:26:18 +0100
committerPeter Maydell <peter.maydell@linaro.org>2015-08-13 11:26:18 +0100
commit0e3e858f6a88b3c3befe9c98227aec846c01d9a1 (patch)
tree643de30dddb97666c7069787fa5536dc7a947991 /hw/arm
parentb0e66d95e4f587b5818d2760668301ee0871ba5e (diff)
hw/arm/virt: Replace magic IRQ constants with macros
Replace magic constants with macros from hw/arm/virt.h and hw/intc/arm_gic_common.h. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Message-id: 1436791864-4582-7-git-send-email-edgar.iglesias@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/arm')
-rw-r--r--hw/arm/virt.c9
1 files changed, 6 insertions, 3 deletions
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index 484689264c..42efad1e57 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -48,6 +48,7 @@
#include "hw/arm/sysbus-fdt.h"
#include "hw/platform-bus.h"
#include "hw/arm/fdt.h"
+#include "hw/intc/arm_gic_common.h"
/* Number of external interrupt lines to configure the GIC with */
#define NUM_IRQS 256
@@ -390,15 +391,17 @@ static void create_gic(VirtBoardInfo *vbi, qemu_irq *pic)
*/
for (i = 0; i < smp_cpus; i++) {
DeviceState *cpudev = DEVICE(qemu_get_cpu(i));
- int ppibase = NUM_IRQS + i * 32;
+ int ppibase = NUM_IRQS + i * GIC_INTERNAL + GIC_NR_SGIS;
/* physical timer; we wire it up to the non-secure timer's ID,
* since a real A15 always has TrustZone but QEMU doesn't.
*/
qdev_connect_gpio_out(cpudev, 0,
- qdev_get_gpio_in(gicdev, ppibase + 30));
+ qdev_get_gpio_in(gicdev,
+ ppibase + ARCH_TIMER_NS_EL1_IRQ));
/* virtual timer */
qdev_connect_gpio_out(cpudev, 1,
- qdev_get_gpio_in(gicdev, ppibase + 27));
+ qdev_get_gpio_in(gicdev,
+ ppibase + ARCH_TIMER_VIRT_IRQ));
sysbus_connect_irq(gicbusdev, i, qdev_get_gpio_in(cpudev, ARM_CPU_IRQ));
sysbus_connect_irq(gicbusdev, i + smp_cpus,