diff options
| author | Marc-André Lureau <marcandre.lureau@redhat.com> | 2016-10-22 12:52:51 +0300 |
|---|---|---|
| committer | Paolo Bonzini <pbonzini@redhat.com> | 2016-10-24 15:27:20 +0200 |
| commit | becdfa00cfa2995e859ccefa4b7d72a72eb96581 (patch) | |
| tree | 8973236c181dcde0dbcd9fd36d122fc7a4bac6d7 /hw/arm | |
| parent | ecb672d14f092f481000ac9cd9d7dc0500692eba (diff) | |
char: replace PROP_CHR with CharBackend
Store the property in a CharBackend instead of CharDriverState*. This
also replace systematically chr by chr.chr to access the
CharDriverState*. The following patches will replace it with calls to
qemu_chr_fe CharBackend functions.
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Message-Id: <20161022095318.17775-12-marcandre.lureau@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'hw/arm')
| -rw-r--r-- | hw/arm/pxa2xx.c | 18 | ||||
| -rw-r--r-- | hw/arm/strongarm.c | 14 |
2 files changed, 17 insertions, 15 deletions
diff --git a/hw/arm/pxa2xx.c b/hw/arm/pxa2xx.c index 98982872d7..27f112c3fb 100644 --- a/hw/arm/pxa2xx.c +++ b/hw/arm/pxa2xx.c @@ -1764,7 +1764,7 @@ struct PXA2xxFIrState { qemu_irq rx_dma; qemu_irq tx_dma; uint32_t enable; - CharDriverState *chr; + CharBackend chr; uint8_t control[3]; uint8_t status[2]; @@ -1898,14 +1898,16 @@ static void pxa2xx_fir_write(void *opaque, hwaddr addr, pxa2xx_fir_update(s); break; case ICDR: - if (s->control[2] & (1 << 2)) /* TXP */ + if (s->control[2] & (1 << 2)) { /* TXP */ ch = value; - else + } else { ch = ~value; - if (s->chr && s->enable && (s->control[0] & (1 << 3))) /* TXE */ + } + if (s->chr.chr && s->enable && (s->control[0] & (1 << 3))) { /* TXE */ /* XXX this blocks entire thread. Rewrite to use * qemu_chr_fe_write and background I/O callbacks */ - qemu_chr_fe_write_all(s->chr, &ch, 1); + qemu_chr_fe_write_all(s->chr.chr, &ch, 1); + } break; case ICSR0: s->status[0] &= ~(value & 0x66); @@ -1973,9 +1975,9 @@ static void pxa2xx_fir_realize(DeviceState *dev, Error **errp) { PXA2xxFIrState *s = PXA2XX_FIR(dev); - if (s->chr) { - qemu_chr_fe_claim_no_fail(s->chr); - qemu_chr_add_handlers(s->chr, pxa2xx_fir_is_empty, + if (s->chr.chr) { + qemu_chr_fe_claim_no_fail(s->chr.chr); + qemu_chr_add_handlers(s->chr.chr, pxa2xx_fir_is_empty, pxa2xx_fir_rx, pxa2xx_fir_event, s); } } diff --git a/hw/arm/strongarm.c b/hw/arm/strongarm.c index 021cbf9a0f..d3e8aff4d7 100644 --- a/hw/arm/strongarm.c +++ b/hw/arm/strongarm.c @@ -912,7 +912,7 @@ typedef struct StrongARMUARTState { SysBusDevice parent_obj; MemoryRegion iomem; - CharDriverState *chr; + CharBackend chr; qemu_irq irq; uint8_t utcr0; @@ -1020,8 +1020,8 @@ static void strongarm_uart_update_parameters(StrongARMUARTState *s) ssp.data_bits = data_bits; ssp.stop_bits = stop_bits; s->char_transmit_time = (NANOSECONDS_PER_SECOND / speed) * frame_size; - if (s->chr) { - qemu_chr_fe_ioctl(s->chr, CHR_IOCTL_SERIAL_SET_PARAMS, &ssp); + if (s->chr.chr) { + qemu_chr_fe_ioctl(s->chr.chr, CHR_IOCTL_SERIAL_SET_PARAMS, &ssp); } DPRINTF(stderr, "%s speed=%d parity=%c data=%d stop=%d\n", s->chr->label, @@ -1107,10 +1107,10 @@ static void strongarm_uart_tx(void *opaque) if (s->utcr3 & UTCR3_LBM) /* loopback */ { strongarm_uart_receive(s, &s->tx_fifo[s->tx_start], 1); - } else if (s->chr) { + } else if (s->chr.chr) { /* XXX this blocks entire thread. Rewrite to use * qemu_chr_fe_write and background I/O callbacks */ - qemu_chr_fe_write_all(s->chr, &s->tx_fifo[s->tx_start], 1); + qemu_chr_fe_write_all(s->chr.chr, &s->tx_fifo[s->tx_start], 1); } s->tx_start = (s->tx_start + 1) % 8; @@ -1239,8 +1239,8 @@ static void strongarm_uart_init(Object *obj) s->rx_timeout_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, strongarm_uart_rx_to, s); s->tx_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, strongarm_uart_tx, s); - if (s->chr) { - qemu_chr_add_handlers(s->chr, + if (s->chr.chr) { + qemu_chr_add_handlers(s->chr.chr, strongarm_uart_can_receive, strongarm_uart_receive, strongarm_uart_event, |