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authorAnthony Liguori <aliguori@amazon.com>2014-01-09 11:23:49 -0800
committerAnthony Liguori <aliguori@amazon.com>2014-01-09 11:23:49 -0800
commitb61740dbef8d1c8fda8a0f46ecb617e6e865e9e2 (patch)
treedc7b24cfa11d1c99a8099fd3fb1e401515afa59e /hw/arm
parentf976b09ea249cccc3fd41c98aaf6512908db0bae (diff)
parent8900aad218f8f2348bcd688eacf06d6c1f66bc69 (diff)
Merge remote-tracking branch 'pmaydell/tags/pull-target-arm-20140108' into staging
target-arm queue: * further A64 decoder patches, including enabling the aarch64-linux-user target; this includes full floating point support. Neon is not yet supported. * cadence UART model fixes. * some minor bug fixes and cleanups. * all the softfloat fixes required by the new A64 instructions; several of these will also be used by PPC. # gpg: Signature made Wed 08 Jan 2014 11:25:12 AM PST using RSA key ID 14360CDE # gpg: Can't check signature: public key not found * pmaydell/tags/pull-target-arm-20140108: (76 commits) target-arm: A64: Add support for FCVT between half, single and double target-arm: A64: Add 1-source 32-to-32 and 64-to-64 FP instructions target-arm: A64: Add floating-point<->integer conversion instructions target-arm: A64: Add floating-point<->fixed-point instructions target-arm: A64: Add extra VFP fixed point conversion helpers target-arm: Ignore most exceptions from scalbn when doing fixpoint conversion target-arm: Rename A32 VFP conversion helpers target-arm: Prepare VFP_CONV_FIX helpers for A64 uses softfloat: Add support for ties-away rounding softfloat: Refactor code handling various rounding modes softfloat: Add float16 <=> float64 conversion functions softfloat: Factor out RoundAndPackFloat16 and NormalizeFloat16Subnormal softfloat: Provide complete set of accessors for fp state softfloat: Fix float64_to_uint32_round_to_zero softfloat: Fix float64_to_uint32 softfloat: Fix float64_to_uint64_round_to_zero softfloat: Add float32_to_uint64() softfloat: Fix factor 2 error for scalbn on denormal inputs softfloat: Only raise Invalid when conversions to int are out of range softfloat: Fix float64_to_uint64 ... Message-id: 1389209439-25448-1-git-send-email-peter.maydell@linaro.org Signed-off-by: Anthony Liguori <aliguori@amazon.com>
Diffstat (limited to 'hw/arm')
-rw-r--r--hw/arm/xilinx_zynq.c17
1 files changed, 6 insertions, 11 deletions
diff --git a/hw/arm/xilinx_zynq.c b/hw/arm/xilinx_zynq.c
index 17251c7a65..98e0958a77 100644
--- a/hw/arm/xilinx_zynq.c
+++ b/hw/arm/xilinx_zynq.c
@@ -49,9 +49,11 @@ static void gem_init(NICInfo *nd, uint32_t base, qemu_irq irq)
DeviceState *dev;
SysBusDevice *s;
- qemu_check_nic_model(nd, "cadence_gem");
dev = qdev_create(NULL, "cadence_gem");
- qdev_set_nic_properties(dev, nd);
+ if (nd->used) {
+ qemu_check_nic_model(nd, "cadence_gem");
+ qdev_set_nic_properties(dev, nd);
+ }
qdev_init_nofail(dev);
s = SYS_BUS_DEVICE(dev);
sysbus_mmio_map(s, 0, base);
@@ -113,7 +115,6 @@ static void zynq_init(QEMUMachineInitArgs *args)
DeviceState *dev;
SysBusDevice *busdev;
qemu_irq pic[64];
- NICInfo *nd;
Error *err = NULL;
int n;
@@ -190,14 +191,8 @@ static void zynq_init(QEMUMachineInitArgs *args)
sysbus_create_varargs("cadence_ttc", 0xF8002000,
pic[69-IRQ_OFFSET], pic[70-IRQ_OFFSET], pic[71-IRQ_OFFSET], NULL);
- for (n = 0; n < nb_nics; n++) {
- nd = &nd_table[n];
- if (n == 0) {
- gem_init(nd, 0xE000B000, pic[54-IRQ_OFFSET]);
- } else if (n == 1) {
- gem_init(nd, 0xE000C000, pic[77-IRQ_OFFSET]);
- }
- }
+ gem_init(&nd_table[0], 0xE000B000, pic[54-IRQ_OFFSET]);
+ gem_init(&nd_table[1], 0xE000C000, pic[77-IRQ_OFFSET]);
dev = qdev_create(NULL, "generic-sdhci");
qdev_init_nofail(dev);