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authorRoy Franz <roy.franz@linaro.org>2013-12-17 19:42:27 +0000
committerPeter Maydell <peter.maydell@linaro.org>2013-12-17 19:42:27 +0000
commit0163a2dc80b52553a478fa6e60f09cef4b338d42 (patch)
tree13c8a9f373641d852e7d1860d2b3602a7bc9e489 /hw/arm
parent4433e660e3ff19747d9ca7fd3873407ecfb276bf (diff)
Fix NOR flash device ID reading
Fix NOR flash manufacturer and device ID reading. This now properly takes into account device widths and device max widths as required. The reading of these IDs uses the same max_width dependent addressing as CFI queries. The old code remains for chips that don't specify a device width, as the new code relies on a device width being set in order to properly operate. The existing code seems very broken. Only ident0 and ident1 are used in the new code, as other fields relate to the lock state of blocks in flash. The VExpress flash configuration has been updated to match the new code, as the existing definition was 'wrong' in order to return the expected results with the broken device ID code. Signed-off-by: Roy Franz <roy.franz@linaro.org> Message-id: 1386279359-32286-8-git-send-email-roy.franz@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/arm')
-rw-r--r--hw/arm/vexpress.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/hw/arm/vexpress.c b/hw/arm/vexpress.c
index 939b468bc8..aaa863e481 100644
--- a/hw/arm/vexpress.c
+++ b/hw/arm/vexpress.c
@@ -499,10 +499,10 @@ static pflash_t *ve_pflash_cfi01_register(hwaddr base, const char *name,
qdev_prop_set_uint8(dev, "width", 4);
qdev_prop_set_uint8(dev, "device-width", 2);
qdev_prop_set_uint8(dev, "big-endian", 0);
- qdev_prop_set_uint16(dev, "id0", 0x00);
- qdev_prop_set_uint16(dev, "id1", 0x89);
+ qdev_prop_set_uint16(dev, "id0", 0x89);
+ qdev_prop_set_uint16(dev, "id1", 0x18);
qdev_prop_set_uint16(dev, "id2", 0x00);
- qdev_prop_set_uint16(dev, "id3", 0x18);
+ qdev_prop_set_uint16(dev, "id3", 0x00);
qdev_prop_set_string(dev, "name", name);
qdev_init_nofail(dev);