diff options
| author | Philippe Mathieu-Daudé <f4bug@amsat.org> | 2018-02-15 18:29:36 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2018-02-15 18:29:36 +0000 |
| commit | 022d72d0b10ba16759cad8563b1cf38ff698967e (patch) | |
| tree | 99742157221d08b33457704468e29eb1f9543dbd /hw/arm | |
| parent | f003d07337a6d4d02c43429b26a4270459afb51a (diff) | |
hw/arm/aspeed: directly map the serial device to the system address space
(qemu) info mtree
address-space: cpu-memory-0
0000000000000000-ffffffffffffffff (prio 0, i/o): system
0000000000000000-0000000007ffffff (prio 0, rom): aspeed.boot_rom
000000001e600000-000000001e7fffff (prio -1, i/o): aspeed_soc.io
- 000000001e784000-000000001e78401f (prio 0, i/o): serial
000000001e620000-000000001e6200ff (prio 0, i/o): aspeed.smc.ast2500-fmc
000000001e630000-000000001e6300ff (prio 0, i/o): aspeed.smc.ast2500-spi1
[...]
000000001e720000-000000001e728fff (prio 0, ram): aspeed.sram
000000001e782000-000000001e782fff (prio 0, i/o): aspeed.timer
+ 000000001e784000-000000001e78401f (prio 0, i/o): serial
000000001e785000-000000001e78501f (prio 0, i/o): aspeed.wdt
000000001e785020-000000001e78503f (prio 0, i/o): aspeed.wdt
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Message-id: 20180209085755.30414-2-f4bug@amsat.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/arm')
| -rw-r--r-- | hw/arm/aspeed_soc.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/hw/arm/aspeed_soc.c b/hw/arm/aspeed_soc.c index c83b7e207b..2a5d041b3b 100644 --- a/hw/arm/aspeed_soc.c +++ b/hw/arm/aspeed_soc.c @@ -257,7 +257,8 @@ static void aspeed_soc_realize(DeviceState *dev, Error **errp) /* UART - attach an 8250 to the IO space as our UART5 */ if (serial_hds[0]) { qemu_irq uart5 = qdev_get_gpio_in(DEVICE(&s->vic), uart_irqs[4]); - serial_mm_init(&s->iomem, ASPEED_SOC_UART_5_BASE, 2, + serial_mm_init(get_system_memory(), + ASPEED_SOC_IOMEM_BASE + ASPEED_SOC_UART_5_BASE, 2, uart5, 38400, serial_hds[0], DEVICE_LITTLE_ENDIAN); } |