Move QOM typedefs and add missing includes

Some typedefs and macros are defined after the type check macros.
This makes it difficult to automatically replace their
definitions with OBJECT_DECLARE_TYPE.

Patch generated using:

 $ ./scripts/codeconverter/converter.py -i \
   --pattern=QOMStructTypedefSplit $(git grep -l '' -- '*.[ch]')

which will split "typdef struct { ... } TypedefName"
declarations.

Followed by:

 $ ./scripts/codeconverter/converter.py -i --pattern=MoveSymbols \
    $(git grep -l '' -- '*.[ch]')

which will:
- move the typedefs and #defines above the type check macros
- add missing #include "qom/object.h" lines if necessary

Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Reviewed-by: Juan Quintela <quintela@redhat.com>
Message-Id: <20200831210740.126168-9-ehabkost@redhat.com>
Reviewed-by: Juan Quintela <quintela@redhat.com>
Message-Id: <20200831210740.126168-10-ehabkost@redhat.com>
Message-Id: <20200831210740.126168-11-ehabkost@redhat.com>
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>

24 files changed, 183 insertions, 107 deletions

diff --git a/hw/arm/collie.c b/hw/arm/collie.c
index 4b35ef4bed..82ffc82dc7 100644
--- a/hw/arm/collie.c
+++ b/hw/arm/collie.c
@@ -18,12 +18,14 @@
 #include "hw/block/flash.h"
 #include "exec/address-spaces.h"
 #include "cpu.h"
+#include "qom/object.h"
 
-typedef struct {
+struct CollieMachineState {
     MachineState parent;
 
     StrongARMState *sa1110;
-} CollieMachineState;
+};
+typedef struct CollieMachineState CollieMachineState;
 
 #define TYPE_COLLIE_MACHINE MACHINE_TYPE_NAME("collie")
 #define COLLIE_MACHINE(obj) \
diff --git a/hw/arm/highbank.c b/hw/arm/highbank.c
index c96f2ab9cf..cbf6e72ad6 100644
--- a/hw/arm/highbank.c
+++ b/hw/arm/highbank.c
@@ -36,6 +36,7 @@
 #include "hw/cpu/a9mpcore.h"
 #include "hw/cpu/a15mpcore.h"
 #include "qemu/log.h"
+#include "qom/object.h"
 
 #define SMP_BOOT_ADDR           0x100
 #define SMP_BOOT_REG            0x40
@@ -155,17 +156,18 @@ static const MemoryRegionOps hb_mem_ops = {
 };
 
 #define TYPE_HIGHBANK_REGISTERS "highbank-regs"
+typedef struct HighbankRegsState HighbankRegsState;
 #define HIGHBANK_REGISTERS(obj) \
     OBJECT_CHECK(HighbankRegsState, (obj), TYPE_HIGHBANK_REGISTERS)
 
-typedef struct {
+struct HighbankRegsState {
     /*< private >*/
     SysBusDevice parent_obj;
     /*< public >*/
 
     MemoryRegion iomem;
     uint32_t regs[NUM_REGS];
-} HighbankRegsState;
+};
 
 static VMStateDescription vmstate_highbank_regs = {
     .name = "highbank-regs",
diff --git a/hw/arm/integratorcp.c b/hw/arm/integratorcp.c
index fe7c2b9d4b..75e608e68e 100644
--- a/hw/arm/integratorcp.c
+++ b/hw/arm/integratorcp.c
@@ -26,12 +26,14 @@
 #include "hw/hw.h"
 #include "hw/irq.h"
 #include "hw/sd/sd.h"
+#include "qom/object.h"
 
 #define TYPE_INTEGRATOR_CM "integrator_core"
+typedef struct IntegratorCMState IntegratorCMState;
 #define INTEGRATOR_CM(obj) \
     OBJECT_CHECK(IntegratorCMState, (obj), TYPE_INTEGRATOR_CM)
 
-typedef struct IntegratorCMState {
+struct IntegratorCMState {
     /*< private >*/
     SysBusDevice parent_obj;
     /*< public >*/
@@ -51,7 +53,7 @@ typedef struct IntegratorCMState {
     uint32_t int_level;
     uint32_t irq_enabled;
     uint32_t fiq_enabled;
-} IntegratorCMState;
+};
 
 static uint8_t integrator_spd[128] = {
    128, 8, 4, 11, 9, 1, 64, 0,  2, 0xa0, 0xa0, 0, 0, 8, 0, 1,
@@ -326,10 +328,11 @@ static void integratorcm_realize(DeviceState *d, Error **errp)
 /* Primary interrupt controller.  */
 
 #define TYPE_INTEGRATOR_PIC "integrator_pic"
+typedef struct icp_pic_state icp_pic_state;
 #define INTEGRATOR_PIC(obj) \
    OBJECT_CHECK(icp_pic_state, (obj), TYPE_INTEGRATOR_PIC)
 
-typedef struct icp_pic_state {
+struct icp_pic_state {
     /*< private >*/
     SysBusDevice parent_obj;
     /*< public >*/
@@ -340,7 +343,7 @@ typedef struct icp_pic_state {
     uint32_t fiq_enabled;
     qemu_irq parent_irq;
     qemu_irq parent_fiq;
-} icp_pic_state;
+};
 
 static const VMStateDescription vmstate_icp_pic = {
     .name = "icp_pic",
@@ -465,10 +468,11 @@ static void icp_pic_init(Object *obj)
 /* CP control registers.  */
 
 #define TYPE_ICP_CONTROL_REGS "icp-ctrl-regs"
+typedef struct ICPCtrlRegsState ICPCtrlRegsState;
 #define ICP_CONTROL_REGS(obj) \
     OBJECT_CHECK(ICPCtrlRegsState, (obj), TYPE_ICP_CONTROL_REGS)
 
-typedef struct ICPCtrlRegsState {
+struct ICPCtrlRegsState {
     /*< private >*/
     SysBusDevice parent_obj;
     /*< public >*/
@@ -477,7 +481,7 @@ typedef struct ICPCtrlRegsState {
 
     qemu_irq mmc_irq;
     uint32_t intreg_state;
-} ICPCtrlRegsState;
+};
 
 #define ICP_GPIO_MMC_WPROT      "mmc-wprot"
 #define ICP_GPIO_MMC_CARDIN     "mmc-cardin"
diff --git a/hw/arm/microbit.c b/hw/arm/microbit.c
index a91acab1cb..e94f711e89 100644
--- a/hw/arm/microbit.c
+++ b/hw/arm/microbit.c
@@ -18,13 +18,15 @@
 #include "hw/arm/nrf51_soc.h"
 #include "hw/i2c/microbit_i2c.h"
 #include "hw/qdev-properties.h"
+#include "qom/object.h"
 
-typedef struct {
+struct MicrobitMachineState {
     MachineState parent;
 
     NRF51State nrf51;
     MicrobitI2CState i2c;
-} MicrobitMachineState;
+};
+typedef struct MicrobitMachineState MicrobitMachineState;
 
 #define TYPE_MICROBIT_MACHINE MACHINE_TYPE_NAME("microbit")
 
diff --git a/hw/arm/mps2-tz.c b/hw/arm/mps2-tz.c
index 28d9e8bfac..8870aea814 100644
--- a/hw/arm/mps2-tz.c
+++ b/hw/arm/mps2-tz.c
@@ -62,6 +62,7 @@
 #include "hw/net/lan9118.h"
 #include "net/net.h"
 #include "hw/core/split-irq.h"
+#include "qom/object.h"
 
 #define MPS2TZ_NUMIRQ 92
 
@@ -70,14 +71,15 @@ typedef enum MPS2TZFPGAType {
     FPGA_AN521,
 } MPS2TZFPGAType;
 
-typedef struct {
+struct MPS2TZMachineClass {
     MachineClass parent;
     MPS2TZFPGAType fpga_type;
     uint32_t scc_id;
     const char *armsse_type;
-} MPS2TZMachineClass;
+};
+typedef struct MPS2TZMachineClass MPS2TZMachineClass;
 
-typedef struct {
+struct MPS2TZMachineState {
     MachineState parent;
 
     ARMSSE iotkit;
@@ -99,7 +101,8 @@ typedef struct {
     qemu_or_irq uart_irq_orgate;
     DeviceState *lan9118;
     SplitIRQ cpu_irq_splitter[MPS2TZ_NUMIRQ];
-} MPS2TZMachineState;
+};
+typedef struct MPS2TZMachineState MPS2TZMachineState;
 
 #define TYPE_MPS2TZ_MACHINE "mps2tz"
 #define TYPE_MPS2TZ_AN505_MACHINE MACHINE_TYPE_NAME("mps2-an505")
diff --git a/hw/arm/mps2.c b/hw/arm/mps2.c
index 9f12934ca8..b5173e398d 100644
--- a/hw/arm/mps2.c
+++ b/hw/arm/mps2.c
@@ -44,19 +44,21 @@
 #include "hw/net/lan9118.h"
 #include "net/net.h"
 #include "hw/watchdog/cmsdk-apb-watchdog.h"
+#include "qom/object.h"
 
 typedef enum MPS2FPGAType {
     FPGA_AN385,
     FPGA_AN511,
 } MPS2FPGAType;
 
-typedef struct {
+struct MPS2MachineClass {
     MachineClass parent;
     MPS2FPGAType fpga_type;
     uint32_t scc_id;
-} MPS2MachineClass;
+};
+typedef struct MPS2MachineClass MPS2MachineClass;
 
-typedef struct {
+struct MPS2MachineState {
     MachineState parent;
 
     ARMv7MState armv7m;
@@ -75,7 +77,8 @@ typedef struct {
     /* CMSDK APB subsystem */
     CMSDKAPBDualTimer dualtimer;
     CMSDKAPBWatchdog watchdog;
-} MPS2MachineState;
+};
+typedef struct MPS2MachineState MPS2MachineState;
 
 #define TYPE_MPS2_MACHINE "mps2"
 #define TYPE_MPS2_AN385_MACHINE MACHINE_TYPE_NAME("mps2-an385")
diff --git a/hw/arm/musca.c b/hw/arm/musca.c
index 4bc737f93b..7fd8634ac5 100644
--- a/hw/arm/musca.c
+++ b/hw/arm/musca.c
@@ -33,6 +33,7 @@
 #include "hw/misc/tz-ppc.h"
 #include "hw/misc/unimp.h"
 #include "hw/rtc/pl031.h"
+#include "qom/object.h"
 
 #define MUSCA_NUMIRQ_MAX 96
 #define MUSCA_PPC_MAX 3
@@ -45,7 +46,7 @@ typedef enum MuscaType {
     MUSCA_B1,
 } MuscaType;
 
-typedef struct {
+struct MuscaMachineClass {
     MachineClass parent;
     MuscaType type;
     uint32_t init_svtor;
@@ -53,9 +54,10 @@ typedef struct {
     int num_irqs;
     const MPCInfo *mpc_info;
     int num_mpcs;
-} MuscaMachineClass;
+};
+typedef struct MuscaMachineClass MuscaMachineClass;
 
-typedef struct {
+struct MuscaMachineState {
     MachineState parent;
 
     ARMSSE sse;
@@ -81,7 +83,8 @@ typedef struct {
     UnimplementedDeviceState sdio;
     UnimplementedDeviceState gpio;
     UnimplementedDeviceState cryptoisland;
-} MuscaMachineState;
+};
+typedef struct MuscaMachineState MuscaMachineState;
 
 #define TYPE_MUSCA_MACHINE "musca"
 #define TYPE_MUSCA_A_MACHINE MACHINE_TYPE_NAME("musca-a")
diff --git a/hw/arm/musicpal.c b/hw/arm/musicpal.c
index f2f4fc0264..695699e01e 100644
--- a/hw/arm/musicpal.c
+++ b/hw/arm/musicpal.c
@@ -34,6 +34,7 @@
 #include "exec/address-spaces.h"
 #include "ui/pixel_ops.h"
 #include "qemu/cutils.h"
+#include "qom/object.h"
 
 #define MP_MISC_BASE            0x80002000
 #define MP_MISC_SIZE            0x00001000
@@ -154,10 +155,11 @@ typedef struct mv88w8618_rx_desc {
 } mv88w8618_rx_desc;
 
 #define TYPE_MV88W8618_ETH "mv88w8618_eth"
+typedef struct mv88w8618_eth_state mv88w8618_eth_state;
 #define MV88W8618_ETH(obj) \
     OBJECT_CHECK(mv88w8618_eth_state, (obj), TYPE_MV88W8618_ETH)
 
-typedef struct mv88w8618_eth_state {
+struct mv88w8618_eth_state {
     /*< private >*/
     SysBusDevice parent_obj;
     /*< public >*/
@@ -177,7 +179,7 @@ typedef struct mv88w8618_eth_state {
     uint32_t cur_rx[4];
     NICState *nic;
     NICConf conf;
-} mv88w8618_eth_state;
+};
 
 static void eth_rx_desc_put(AddressSpace *dma_as, uint32_t addr,
                             mv88w8618_rx_desc *desc)
@@ -483,10 +485,11 @@ static const TypeInfo mv88w8618_eth_info = {
 #define MP_LCD_TEXTCOLOR        0xe0e0ff /* RRGGBB */
 
 #define TYPE_MUSICPAL_LCD "musicpal_lcd"
+typedef struct musicpal_lcd_state musicpal_lcd_state;
 #define MUSICPAL_LCD(obj) \
     OBJECT_CHECK(musicpal_lcd_state, (obj), TYPE_MUSICPAL_LCD)
 
-typedef struct musicpal_lcd_state {
+struct musicpal_lcd_state {
     /*< private >*/
     SysBusDevice parent_obj;
     /*< public >*/
@@ -499,7 +502,7 @@ typedef struct musicpal_lcd_state {
     uint32_t page_off;
     QemuConsole *con;
     uint8_t video_ram[128*64/8];
-} musicpal_lcd_state;
+};
 
 static uint8_t scale_lcd_color(musicpal_lcd_state *s, uint8_t col)
 {
@@ -700,10 +703,11 @@ static const TypeInfo musicpal_lcd_info = {
 #define MP_PIC_ENABLE_CLR       0x0C
 
 #define TYPE_MV88W8618_PIC "mv88w8618_pic"
+typedef struct mv88w8618_pic_state mv88w8618_pic_state;
 #define MV88W8618_PIC(obj) \
     OBJECT_CHECK(mv88w8618_pic_state, (obj), TYPE_MV88W8618_PIC)
 
-typedef struct mv88w8618_pic_state {
+struct mv88w8618_pic_state {
     /*< private >*/
     SysBusDevice parent_obj;
     /*< public >*/
@@ -712,7 +716,7 @@ typedef struct mv88w8618_pic_state {
     uint32_t level;
     uint32_t enabled;
     qemu_irq parent_irq;
-} mv88w8618_pic_state;
+};
 
 static void mv88w8618_pic_update(mv88w8618_pic_state *s)
 {
@@ -837,17 +841,18 @@ typedef struct mv88w8618_timer_state {
 } mv88w8618_timer_state;
 
 #define TYPE_MV88W8618_PIT "mv88w8618_pit"
+typedef struct mv88w8618_pit_state mv88w8618_pit_state;
 #define MV88W8618_PIT(obj) \
     OBJECT_CHECK(mv88w8618_pit_state, (obj), TYPE_MV88W8618_PIT)
 
-typedef struct mv88w8618_pit_state {
+struct mv88w8618_pit_state {
     /*< private >*/
     SysBusDevice parent_obj;
     /*< public >*/
 
     MemoryRegion iomem;
     mv88w8618_timer_state timer[4];
-} mv88w8618_pit_state;
+};
 
 static void mv88w8618_timer_tick(void *opaque)
 {
@@ -1004,17 +1009,18 @@ static const TypeInfo mv88w8618_pit_info = {
 #define MP_FLASHCFG_CFGR0    0x04
 
 #define TYPE_MV88W8618_FLASHCFG "mv88w8618_flashcfg"
+typedef struct mv88w8618_flashcfg_state mv88w8618_flashcfg_state;
 #define MV88W8618_FLASHCFG(obj) \
     OBJECT_CHECK(mv88w8618_flashcfg_state, (obj), TYPE_MV88W8618_FLASHCFG)
 
-typedef struct mv88w8618_flashcfg_state {
+struct mv88w8618_flashcfg_state {
     /*< private >*/
     SysBusDevice parent_obj;
     /*< public >*/
 
     MemoryRegion iomem;
     uint32_t cfgr0;
-} mv88w8618_flashcfg_state;
+};
 
 static uint64_t mv88w8618_flashcfg_read(void *opaque,
                                         hwaddr offset,
@@ -1090,10 +1096,11 @@ static const TypeInfo mv88w8618_flashcfg_info = {
 
 #define MP_BOARD_REVISION       0x31
 
-typedef struct {
+struct MusicPalMiscState {
     SysBusDevice parent_obj;
     MemoryRegion iomem;
-} MusicPalMiscState;
+};
+typedef struct MusicPalMiscState MusicPalMiscState;
 
 #define TYPE_MUSICPAL_MISC "musicpal-misc"
 #define MUSICPAL_MISC(obj) \
@@ -1202,10 +1209,11 @@ static void mv88w8618_wlan_realize(DeviceState *dev, Error **errp)
 #define MP_OE_LCD_BRIGHTNESS    0x0007
 
 #define TYPE_MUSICPAL_GPIO "musicpal_gpio"
+typedef struct musicpal_gpio_state musicpal_gpio_state;
 #define MUSICPAL_GPIO(obj) \
     OBJECT_CHECK(musicpal_gpio_state, (obj), TYPE_MUSICPAL_GPIO)
 
-typedef struct musicpal_gpio_state {
+struct musicpal_gpio_state {
     /*< private >*/
     SysBusDevice parent_obj;
     /*< public >*/
@@ -1219,7 +1227,7 @@ typedef struct musicpal_gpio_state {
     uint32_t isr;
     qemu_irq irq;
     qemu_irq out[5]; /* 3 brightness out + 2 lcd (data and clock ) */
-} musicpal_gpio_state;
+};
 
 static void musicpal_gpio_brightness_update(musicpal_gpio_state *s) {
     int i;
@@ -1452,10 +1460,11 @@ static const TypeInfo musicpal_gpio_info = {
 #define MP_KEY_BTN_NAVIGATION  (1 << 7)
 
 #define TYPE_MUSICPAL_KEY "musicpal_key"
+typedef struct musicpal_key_state musicpal_key_state;
 #define MUSICPAL_KEY(obj) \
     OBJECT_CHECK(musicpal_key_state, (obj), TYPE_MUSICPAL_KEY)
 
-typedef struct musicpal_key_state {
+struct musicpal_key_state {
     /*< private >*/
     SysBusDevice parent_obj;
     /*< public >*/
@@ -1464,7 +1473,7 @@ typedef struct musicpal_key_state {
     uint32_t kbd_extended;
     uint32_t pressed_keys;
     qemu_irq out[8];
-} musicpal_key_state;
+};
 
 static void musicpal_key_event(void *opaque, int keycode)
 {
diff --git a/hw/arm/palm.c b/hw/arm/palm.c
index e7bc9ea4c6..ddabb0e2d6 100644
--- a/hw/arm/palm.c
+++ b/hw/arm/palm.c
@@ -32,6 +32,7 @@
 #include "exec/address-spaces.h"
 #include "cpu.h"
 #include "qemu/cutils.h"
+#include "qom/object.h"
 
 static uint64_t static_read(void *opaque, hwaddr offset, unsigned size)
 {
@@ -132,12 +133,13 @@ static void palmte_button_event(void *opaque, int keycode)
  */
 
 #define TYPE_PALM_MISC_GPIO "palm-misc-gpio"
+typedef struct PalmMiscGPIOState PalmMiscGPIOState;
 #define PALM_MISC_GPIO(obj) \
     OBJECT_CHECK(PalmMiscGPIOState, (obj), TYPE_PALM_MISC_GPIO)
 
-typedef struct PalmMiscGPIOState {
+struct PalmMiscGPIOState {
     SysBusDevice parent_obj;
-} PalmMiscGPIOState;
+};
 
 static void palmte_onoff_gpios(void *opaque, int line, int level)
 {
diff --git a/hw/arm/pxa2xx.c b/hw/arm/pxa2xx.c
index 76975d17a4..a48a32ee09 100644
--- a/hw/arm/pxa2xx.c
+++ b/hw/arm/pxa2xx.c
@@ -28,6 +28,7 @@
 #include "sysemu/qtest.h"
 #include "qemu/cutils.h"
 #include "qemu/log.h"
+#include "qom/object.h"
 
 static struct {
     hwaddr io_base;
@@ -469,11 +470,12 @@ static const VMStateDescription vmstate_pxa2xx_mm = {
 };
 
 #define TYPE_PXA2XX_SSP "pxa2xx-ssp"
+typedef struct PXA2xxSSPState PXA2xxSSPState;
 #define PXA2XX_SSP(obj) \
     OBJECT_CHECK(PXA2xxSSPState, (obj), TYPE_PXA2XX_SSP)
 
 /* Synchronous Serial Ports */
-typedef struct {
+struct PXA2xxSSPState {
     /*< private >*/
     SysBusDevice parent_obj;
     /*< public >*/
@@ -495,7 +497,7 @@ typedef struct {
     uint32_t rx_fifo[16];
     uint32_t rx_level;
     uint32_t rx_start;
-} PXA2xxSSPState;
+};
 
 static bool pxa2xx_ssp_vmstate_validate(void *opaque, int version_id)
 {
@@ -809,10 +811,11 @@ static void pxa2xx_ssp_init(Object *obj)
 #define PIAR		0x38	/* RTC Periodic Interrupt Alarm register */
 
 #define TYPE_PXA2XX_RTC "pxa2xx_rtc"
+typedef struct PXA2xxRTCState PXA2xxRTCState;
 #define PXA2XX_RTC(obj) \
     OBJECT_CHECK(PXA2xxRTCState, (obj), TYPE_PXA2XX_RTC)
 
-typedef struct {
+struct PXA2xxRTCState {
     /*< private >*/
     SysBusDevice parent_obj;
     /*< public >*/
@@ -843,7 +846,7 @@ typedef struct {
     QEMUTimer *rtc_swal2;
     QEMUTimer *rtc_pi;
     qemu_irq rtc_irq;
-} PXA2xxRTCState;
+};
 
 static inline void pxa2xx_rtc_int_update(PXA2xxRTCState *s)
 {
@@ -1242,14 +1245,15 @@ static const TypeInfo pxa2xx_rtc_sysbus_info = {
 /* I2C Interface */
 
 #define TYPE_PXA2XX_I2C_SLAVE "pxa2xx-i2c-slave"
+typedef struct PXA2xxI2CSlaveState PXA2xxI2CSlaveState;
 #define PXA2XX_I2C_SLAVE(obj) \
     OBJECT_CHECK(PXA2xxI2CSlaveState, (obj), TYPE_PXA2XX_I2C_SLAVE)
 
-typedef struct PXA2xxI2CSlaveState {
+struct PXA2xxI2CSlaveState {
     I2CSlave parent_obj;
 
     PXA2xxI2CState *host;
-} PXA2xxI2CSlaveState;
+};
 
 struct PXA2xxI2CState {
     /*< private >*/
diff --git a/hw/arm/pxa2xx_gpio.c b/hw/arm/pxa2xx_gpio.c
index d6d0d0b08e..2cd6dd929e 100644
--- a/hw/arm/pxa2xx_gpio.c
+++ b/hw/arm/pxa2xx_gpio.c
@@ -17,14 +17,15 @@
 #include "qapi/error.h"
 #include "qemu/log.h"
 #include "qemu/module.h"
+#include "qom/object.h"
 
 #define PXA2XX_GPIO_BANKS	4
 
 #define TYPE_PXA2XX_GPIO "pxa2xx-gpio"
+typedef struct PXA2xxGPIOInfo PXA2xxGPIOInfo;
 #define PXA2XX_GPIO(obj) \
     OBJECT_CHECK(PXA2xxGPIOInfo, (obj), TYPE_PXA2XX_GPIO)
 
-typedef struct PXA2xxGPIOInfo PXA2xxGPIOInfo;
 struct PXA2xxGPIOInfo {
     /*< private >*/
     SysBusDevice parent_obj;
diff --git a/hw/arm/pxa2xx_pic.c b/hw/arm/pxa2xx_pic.c
index ceee6aa48d..00e72fde4e 100644
--- a/hw/arm/pxa2xx_pic.c
+++ b/hw/arm/pxa2xx_pic.c
@@ -16,6 +16,7 @@
 #include "hw/arm/pxa.h"
 #include "hw/sysbus.h"
 #include "migration/vmstate.h"
+#include "qom/object.h"
 
 #define ICIP	0x00	/* Interrupt Controller IRQ Pending register */
 #define ICMR	0x04	/* Interrupt Controller Mask register */
@@ -37,10 +38,11 @@
 #define PXA2XX_PIC_SRCS	40
 
 #define TYPE_PXA2XX_PIC "pxa2xx_pic"
+typedef struct PXA2xxPICState PXA2xxPICState;
 #define PXA2XX_PIC(obj) \
     OBJECT_CHECK(PXA2xxPICState, (obj), TYPE_PXA2XX_PIC)
 
-typedef struct {
+struct PXA2xxPICState {
     /*< private >*/
     SysBusDevice parent_obj;
     /*< public >*/
@@ -52,7 +54,7 @@ typedef struct {
     uint32_t is_fiq[2];
     uint32_t int_idle;
     uint32_t priority[PXA2XX_PIC_SRCS];
-} PXA2xxPICState;
+};
 
 static void pxa2xx_pic_update(void *opaque)
 {
diff --git a/hw/arm/raspi.c b/hw/arm/raspi.c
index b2d6c9688f..d9f7eeb06b 100644
--- a/hw/arm/raspi.c
+++ b/hw/arm/raspi.c
@@ -24,6 +24,7 @@
 #include "hw/loader.h"
 #include "hw/arm/boot.h"
 #include "sysemu/sysemu.h"
+#include "qom/object.h"
 
 #define SMPBOOT_ADDR    0x300 /* this should leave enough space for ATAGS */
 #define MVBAR_ADDR      0x400 /* secure vectors */
@@ -35,19 +36,21 @@
 /* Registered machine type (matches RPi Foundation bootloader and U-Boot) */
 #define MACH_TYPE_BCM2708   3138
 
-typedef struct RaspiMachineState {
+struct RaspiMachineState {
     /*< private >*/
     MachineState parent_obj;
     /*< public >*/
     BCM283XState soc;
-} RaspiMachineState;
+};
+typedef struct RaspiMachineState RaspiMachineState;
 
-typedef struct RaspiMachineClass {
+struct RaspiMachineClass {
     /*< private >*/
     MachineClass parent_obj;
     /*< public >*/
     uint32_t board_rev;
-} RaspiMachineClass;
+};
+typedef struct RaspiMachineClass RaspiMachineClass;
 
 #define TYPE_RASPI_MACHINE       MACHINE_TYPE_NAME("raspi-common")
 #define RASPI_MACHINE(obj) \
diff --git a/hw/arm/sbsa-ref.c b/hw/arm/sbsa-ref.c
index 47b5286d46..a638fb369e 100644
--- a/hw/arm/sbsa-ref.c
+++ b/hw/arm/sbsa-ref.c
@@ -41,6 +41,7 @@
 #include "hw/usb.h"
 #include "hw/char/pl011.h"
 #include "net/net.h"
+#include "qom/object.h"
 
 #define RAMLIMIT_GB 8192
 #define RAMLIMIT_BYTES (RAMLIMIT_GB * GiB)
@@ -84,7 +85,7 @@ typedef struct MemMapEntry {
     hwaddr size;
 } MemMapEntry;
 
-typedef struct {
+struct SBSAMachineState {
     MachineState parent;
     struct arm_boot_info bootinfo;
     int smp_cpus;
@@ -93,7 +94,8 @@ typedef struct {
     int psci_conduit;
     DeviceState *gic;
     PFlashCFI01 *flash[2];
-} SBSAMachineState;
+};
+typedef struct SBSAMachineState SBSAMachineState;
 
 #define TYPE_SBSA_MACHINE   MACHINE_TYPE_NAME("sbsa-ref")
 #define SBSA_MACHINE(obj) \
diff --git a/hw/arm/spitz.c b/hw/arm/spitz.c
index 7ac8254aa6..0bf5745eb2 100644
--- a/hw/arm/spitz.c
+++ b/hw/arm/spitz.c
@@ -34,16 +34,18 @@
 #include "migration/vmstate.h"
 #include "exec/address-spaces.h"
 #include "cpu.h"
+#include "qom/object.h"
 
 enum spitz_model_e { spitz, akita, borzoi, terrier };
 
-typedef struct {
+struct SpitzMachineClass {
     MachineClass parent;
     enum spitz_model_e model;
     int arm_id;
-} SpitzMachineClass;
+};
+typedef struct SpitzMachineClass SpitzMachineClass;
 
-typedef struct {
+struct SpitzMachineState {
     MachineState parent;
     PXA2xxState *mpu;
     DeviceState *mux;
@@ -53,7 +55,8 @@ typedef struct {
     DeviceState *scp0;
     DeviceState *scp1;
     DeviceState *misc_gpio;
-} SpitzMachineState;
+};
+typedef struct SpitzMachineState SpitzMachineState;
 
 #define TYPE_SPITZ_MACHINE "spitz-common"
 #define SPITZ_MACHINE(obj) \
@@ -85,9 +88,10 @@ typedef struct {
 #define FLASHCTL_NCE            (FLASHCTL_CE0 | FLASHCTL_CE1)
 
 #define TYPE_SL_NAND "sl-nand"
+typedef struct SLNANDState SLNANDState;
 #define SL_NAND(obj) OBJECT_CHECK(SLNANDState, (obj), TYPE_SL_NAND)
 
-typedef struct {
+struct SLNANDState {
     SysBusDevice parent_obj;
 
     MemoryRegion iomem;
@@ -96,7 +100,7 @@ typedef struct {
     uint8_t manf_id;
     uint8_t chip_id;
     ECCState ecc;
-} SLNANDState;
+};
 
 static uint64_t sl_read(void *opaque, hwaddr addr, unsigned size)
 {
@@ -261,10 +265,11 @@ static const int spitz_gpiomap[5] = {
 };
 
 #define TYPE_SPITZ_KEYBOARD "spitz-keyboard"
+typedef struct SpitzKeyboardState SpitzKeyboardState;
 #define SPITZ_KEYBOARD(obj) \
     OBJECT_CHECK(SpitzKeyboardState, (obj), TYPE_SPITZ_KEYBOARD)
 
-typedef struct {
+struct SpitzKeyboardState {
     SysBusDevice parent_obj;
 
     qemu_irq sense[SPITZ_KEY_SENSE_NUM];
@@ -280,7 +285,7 @@ typedef struct {
     uint8_t fifo[16];
     int fifopos, fifolen;
     QEMUTimer *kbdtimer;
-} SpitzKeyboardState;
+};
 
 static void spitz_keyboard_sense_update(SpitzKeyboardState *s)
 {
@@ -580,13 +585,14 @@ static void spitz_keyboard_realize(DeviceState *dev, Error **errp)
 #define LCDTG_POLCTRL   0x07
 
 #define TYPE_SPITZ_LCDTG "spitz-lcdtg"
+typedef struct SpitzLCDTG SpitzLCDTG;
 #define SPITZ_LCDTG(obj) OBJECT_CHECK(SpitzLCDTG, (obj), TYPE_SPITZ_LCDTG)
 
-typedef struct {
+struct SpitzLCDTG {
     SSISlave ssidev;
     uint32_t bl_intensity;
     uint32_t bl_power;
-} SpitzLCDTG;
+};
 
 static void spitz_bl_update(SpitzLCDTG *s)
 {
@@ -668,14 +674,15 @@ static void spitz_lcdtg_realize(SSISlave *ssi, Error **errp)
 #define SPITZ_GPIO_TP_INT       11
 
 #define TYPE_CORGI_SSP "corgi-ssp"
+typedef struct CorgiSSPState CorgiSSPState;
 #define CORGI_SSP(obj) OBJECT_CHECK(CorgiSSPState, (obj), TYPE_CORGI_SSP)
 
 /* "Demux" the signal based on current chipselect */
-typedef struct {
+struct CorgiSSPState {
     SSISlave ssidev;
     SSIBus *bus[3];
     uint32_t enable[3];
-} CorgiSSPState;
+};
 
 static uint32_t corgi_ssp_transfer(SSISlave *dev, uint32_t value)
 {
@@ -819,14 +826,15 @@ static void spitz_akita_i2c_setup(PXA2xxState *cpu)
  *  + named GPIO output "adc-temp": the ADC value, to be wired up to the max111x
  */
 #define TYPE_SPITZ_MISC_GPIO "spitz-misc-gpio"
+typedef struct SpitzMiscGPIOState SpitzMiscGPIOState;
 #define SPITZ_MISC_GPIO(obj) \
     OBJECT_CHECK(SpitzMiscGPIOState, (obj), TYPE_SPITZ_MISC_GPIO)
 
-typedef struct SpitzMiscGPIOState {
+struct SpitzMiscGPIOState {
     SysBusDevice parent_obj;
 
     qemu_irq adc_value;
-} SpitzMiscGPIOState;
+};
 
 static void spitz_misc_charging(void *opaque, int n, int level)
 {
diff --git a/hw/arm/stellaris.c b/hw/arm/stellaris.c
index 5f9d080180..d8d7d3a43b 100644
--- a/hw/arm/stellaris.c
+++ b/hw/arm/stellaris.c
@@ -27,6 +27,7 @@
 #include "migration/vmstate.h"
 #include "hw/misc/unimp.h"
 #include "cpu.h"
+#include "qom/object.h"
 
 #define GPIO_A 0
 #define GPIO_B 1
@@ -57,10 +58,11 @@ typedef const struct {
 /* General purpose timer module.  */
 
 #define TYPE_STELLARIS_GPTM "stellaris-gptm"
+typedef struct gptm_state gptm_state;
 #define STELLARIS_GPTM(obj) \
     OBJECT_CHECK(gptm_state, (obj), TYPE_STELLARIS_GPTM)
 
-typedef struct gptm_state {
+struct gptm_state {
     SysBusDevice parent_obj;
 
     MemoryRegion iomem;
@@ -80,7 +82,7 @@ typedef struct gptm_state {
     /* The timers have an alternate output used to trigger the ADC.  */
     qemu_irq trigger;
     qemu_irq irq;
-} gptm_state;
+};
 
 static void gptm_update_irq(gptm_state *s)
 {
@@ -719,10 +721,11 @@ static int stellaris_sys_init(uint32_t base, qemu_irq irq,
 /* I2C controller.  */
 
 #define TYPE_STELLARIS_I2C "stellaris-i2c"
+typedef struct stellaris_i2c_state stellaris_i2c_state;
 #define STELLARIS_I2C(obj) \
     OBJECT_CHECK(stellaris_i2c_state, (obj), TYPE_STELLARIS_I2C)
 
-typedef struct {
+struct stellaris_i2c_state {
     SysBusDevice parent_obj;
 
     I2CBus *bus;
@@ -735,7 +738,7 @@ typedef struct {
     uint32_t mimr;
     uint32_t mris;
     uint32_t mcr;
-} stellaris_i2c_state;
+};
 
 #define STELLARIS_I2C_MCS_BUSY    0x01
 #define STELLARIS_I2C_MCS_ERROR   0x02
@@ -932,10 +935,11 @@ static void stellaris_i2c_init(Object *obj)
 #define STELLARIS_ADC_FIFO_FULL     0x1000
 
 #define TYPE_STELLARIS_ADC "stellaris-adc"
+typedef struct StellarisADCState stellaris_adc_state;
 #define STELLARIS_ADC(obj) \
     OBJECT_CHECK(stellaris_adc_state, (obj), TYPE_STELLARIS_ADC)
 
-typedef struct StellarisADCState {
+struct StellarisADCState {
     SysBusDevice parent_obj;
 
     MemoryRegion iomem;
@@ -955,7 +959,7 @@ typedef struct StellarisADCState {
     uint32_t ssctl[4];
     uint32_t noise;
     qemu_irq irq[4];
-} stellaris_adc_state;
+};
 
 static uint32_t stellaris_adc_fifo_read(stellaris_adc_state *s, int n)
 {
diff --git a/hw/arm/strongarm.c b/hw/arm/strongarm.c
index 2639b9ae55..8faeaf8079 100644
--- a/hw/arm/strongarm.c
+++ b/hw/arm/strongarm.c
@@ -45,6 +45,7 @@
 #include "qapi/error.h"
 #include "qemu/cutils.h"
 #include "qemu/log.h"
+#include "qom/object.h"
 
 //#define DEBUG
 
@@ -84,10 +85,11 @@ static struct {
 /* Interrupt Controller */
 
 #define TYPE_STRONGARM_PIC "strongarm_pic"
+typedef struct StrongARMPICState StrongARMPICState;
 #define STRONGARM_PIC(obj) \
     OBJECT_CHECK(StrongARMPICState, (obj), TYPE_STRONGARM_PIC)
 
-typedef struct StrongARMPICState {
+struct StrongARMPICState {
     SysBusDevice parent_obj;
 
     MemoryRegion iomem;
@@ -98,7 +100,7 @@ typedef struct StrongARMPICState {
     uint32_t enabled;
     uint32_t is_fiq;
     uint32_t int_idle;
-} StrongARMPICState;
+};
 
 #define ICIP    0x00
 #define ICMR    0x04
@@ -252,10 +254,11 @@ static const TypeInfo strongarm_pic_info = {
  * f = 32 768 / (RTTR_trim + 1) */
 
 #define TYPE_STRONGARM_RTC "strongarm-rtc"
+typedef struct StrongARMRTCState StrongARMRTCState;
 #define STRONGARM_RTC(obj) \
     OBJECT_CHECK(StrongARMRTCState, (obj), TYPE_STRONGARM_RTC)
 
-typedef struct StrongARMRTCState {
+struct StrongARMRTCState {
     SysBusDevice parent_obj;
 
     MemoryRegion iomem;
@@ -268,7 +271,7 @@ typedef struct StrongARMRTCState {
     QEMUTimer *rtc_hz;
     qemu_irq rtc_irq;
     qemu_irq rtc_hz_irq;
-} StrongARMRTCState;
+};
 
 static inline void strongarm_rtc_int_update(StrongARMRTCState *s)
 {
@@ -478,10 +481,10 @@ static const TypeInfo strongarm_rtc_sysbus_info = {
 #define GAFR 0x1c
 
 #define TYPE_STRONGARM_GPIO "strongarm-gpio"
+typedef struct StrongARMGPIOInfo StrongARMGPIOInfo;
 #define STRONGARM_GPIO(obj) \
     OBJECT_CHECK(StrongARMGPIOInfo, (obj), TYPE_STRONGARM_GPIO)
 
-typedef struct StrongARMGPIOInfo StrongARMGPIOInfo;
 struct StrongARMGPIOInfo {
     SysBusDevice busdev;
     MemoryRegion iomem;
@@ -717,10 +720,10 @@ static const TypeInfo strongarm_gpio_info = {
 #define PPFR 0x10
 
 #define TYPE_STRONGARM_PPC "strongarm-ppc"
+typedef struct StrongARMPPCInfo StrongARMPPCInfo;
 #define STRONGARM_PPC(obj) \
     OBJECT_CHECK(StrongARMPPCInfo, (obj), TYPE_STRONGARM_PPC)
 
-typedef struct StrongARMPPCInfo StrongARMPPCInfo;
 struct StrongARMPPCInfo {
     SysBusDevice parent_obj;
 
@@ -918,10 +921,11 @@ static const TypeInfo strongarm_ppc_info = {
 #define RX_FIFO_ROR (1 << 10)
 
 #define TYPE_STRONGARM_UART "strongarm-uart"
+typedef struct StrongARMUARTState StrongARMUARTState;
 #define STRONGARM_UART(obj) \
     OBJECT_CHECK(StrongARMUARTState, (obj), TYPE_STRONGARM_UART)
 
-typedef struct StrongARMUARTState {
+struct StrongARMUARTState {
     SysBusDevice parent_obj;
 
     MemoryRegion iomem;
@@ -945,7 +949,7 @@ typedef struct StrongARMUARTState {
     bool wait_break_end;
     QEMUTimer *rx_timeout_timer;
     QEMUTimer *tx_timer;
-} StrongARMUARTState;
+};
 
 static void strongarm_uart_update_status(StrongARMUARTState *s)
 {
@@ -1349,10 +1353,11 @@ static const TypeInfo strongarm_uart_info = {
 /* Synchronous Serial Ports */
 
 #define TYPE_STRONGARM_SSP "strongarm-ssp"
+typedef struct StrongARMSSPState StrongARMSSPState;
 #define STRONGARM_SSP(obj) \
     OBJECT_CHECK(StrongARMSSPState, (obj), TYPE_STRONGARM_SSP)
 
-typedef struct StrongARMSSPState {
+struct StrongARMSSPState {
     SysBusDevice parent_obj;
 
     MemoryRegion iomem;
@@ -1365,7 +1370,7 @@ typedef struct StrongARMSSPState {
     uint16_t rx_fifo[8];
     uint8_t rx_level;
     uint8_t rx_start;
-} StrongARMSSPState;
+};
 
 #define SSCR0 0x60 /* SSP Control register 0 */
 #define SSCR1 0x64 /* SSP Control register 1 */
diff --git a/hw/arm/tosa.c b/hw/arm/tosa.c
index 90eef1f14d..6ec83a2e2d 100644
--- a/hw/arm/tosa.c
+++ b/hw/arm/tosa.c
@@ -25,6 +25,7 @@
 #include "hw/ssi/ssi.h"
 #include "hw/sysbus.h"
 #include "exec/address-spaces.h"
+#include "qom/object.h"
 
 #define TOSA_RAM 0x04000000
 #define TOSA_ROM 0x00800000
@@ -74,12 +75,13 @@ static void tosa_microdrive_attach(PXA2xxState *cpu)
  */
 
 #define TYPE_TOSA_MISC_GPIO "tosa-misc-gpio"
+typedef struct TosaMiscGPIOState TosaMiscGPIOState;
 #define TOSA_MISC_GPIO(obj) \
     OBJECT_CHECK(TosaMiscGPIOState, (obj), TYPE_TOSA_MISC_GPIO)
 
-typedef struct TosaMiscGPIOState {
+struct TosaMiscGPIOState {
     SysBusDevice parent_obj;
-} TosaMiscGPIOState;
+};
 
 static void tosa_gpio_leds(void *opaque, int line, int level)
 {
@@ -170,14 +172,15 @@ static void tosa_ssp_realize(SSISlave *dev, Error **errp)
 }
 
 #define TYPE_TOSA_DAC "tosa_dac"
+typedef struct TosaDACState TosaDACState;
 #define TOSA_DAC(obj) OBJECT_CHECK(TosaDACState, (obj), TYPE_TOSA_DAC)
 
-typedef struct {
+struct TosaDACState {
     I2CSlave parent_obj;
 
     int len;
     char buf[3];
-} TosaDACState;
+};
 
 static int tosa_dac_send(I2CSlave *i2c, uint8_t data)
 {
diff --git a/hw/arm/versatilepb.c b/hw/arm/versatilepb.c
index 9127579984..0e2d74cef2 100644
--- a/hw/arm/versatilepb.c
+++ b/hw/arm/versatilepb.c
@@ -26,6 +26,7 @@
 #include "qemu/error-report.h"
 #include "hw/char/pl011.h"
 #include "hw/sd/sd.h"
+#include "qom/object.h"
 
 #define VERSATILE_FLASH_ADDR 0x34000000
 #define VERSATILE_FLASH_SIZE (64 * 1024 * 1024)
@@ -34,10 +35,11 @@
 /* Primary interrupt controller.  */
 
 #define TYPE_VERSATILE_PB_SIC "versatilepb_sic"
+typedef struct vpb_sic_state vpb_sic_state;
 #define VERSATILE_PB_SIC(obj) \
     OBJECT_CHECK(vpb_sic_state, (obj), TYPE_VERSATILE_PB_SIC)
 
-typedef struct vpb_sic_state {
+struct vpb_sic_state {
     SysBusDevice parent_obj;
 
     MemoryRegion iomem;
@@ -46,7 +48,7 @@ typedef struct vpb_sic_state {
     uint32_t pic_enable;
     qemu_irq parent[32];
     int irq;
-} vpb_sic_state;
+};
 
 static const VMStateDescription vmstate_vpb_sic = {
     .name = "versatilepb_sic",
diff --git a/hw/arm/vexpress.c b/hw/arm/vexpress.c
index 95405f5940..4c2c377823 100644
--- a/hw/arm/vexpress.c
+++ b/hw/arm/vexpress.c
@@ -44,6 +44,7 @@
 #include "hw/cpu/a15mpcore.h"
 #include "hw/i2c/arm_sbcon_i2c.h"
 #include "hw/sd/sd.h"
+#include "qom/object.h"
 
 #define VEXPRESS_BOARD_ID 0x8e0
 #define VEXPRESS_FLASH_SIZE (64 * 1024 * 1024)
@@ -166,16 +167,18 @@ static hwaddr motherboard_aseries_map[] = {
 
 typedef struct VEDBoardInfo VEDBoardInfo;
 
-typedef struct {
+struct VexpressMachineClass {
     MachineClass parent;
     VEDBoardInfo *daughterboard;
-} VexpressMachineClass;
+};
+typedef struct VexpressMachineClass VexpressMachineClass;
 
-typedef struct {
+struct VexpressMachineState {
     MachineState parent;
     bool secure;
     bool virt;
-} VexpressMachineState;
+};
+typedef struct VexpressMachineState VexpressMachineState;
 
 #define TYPE_VEXPRESS_MACHINE   "vexpress"
 #define TYPE_VEXPRESS_A9_MACHINE   MACHINE_TYPE_NAME("vexpress-a9")
diff --git a/hw/arm/xilinx_zynq.c b/hw/arm/xilinx_zynq.c
index 969ef0727c..bce99ef7be 100644
--- a/hw/arm/xilinx_zynq.c
+++ b/hw/arm/xilinx_zynq.c
@@ -37,8 +37,10 @@
 #include "hw/cpu/a9mpcore.h"
 #include "hw/qdev-clock.h"
 #include "sysemu/reset.h"
+#include "qom/object.h"
 
 #define TYPE_ZYNQ_MACHINE MACHINE_TYPE_NAME("xilinx-zynq-a9")
+typedef struct ZynqMachineState ZynqMachineState;
 #define ZYNQ_MACHINE(obj) \
     OBJECT_CHECK(ZynqMachineState, (obj), TYPE_ZYNQ_MACHINE)
 
@@ -84,10 +86,10 @@ static const int dma_irqs[8] = {
     0xe3401000 + ARMV7_IMM16(extract32((val), 16, 16)), /* movt r1 ... */ \
     0xe5801000 + (addr)
 
-typedef struct ZynqMachineState {
+struct ZynqMachineState {
     MachineState parent;
     Clock *ps_clk;
-} ZynqMachineState;
+};
 
 static void zynq_write_board_setup(ARMCPU *cpu,
                                    const struct arm_boot_info *info)
diff --git a/hw/arm/xlnx-versal-virt.c b/hw/arm/xlnx-versal-virt.c
index 4b3152ee77..ffa9dd476b 100644
--- a/hw/arm/xlnx-versal-virt.c
+++ b/hw/arm/xlnx-versal-virt.c
@@ -22,12 +22,14 @@
 #include "cpu.h"
 #include "hw/qdev-properties.h"
 #include "hw/arm/xlnx-versal.h"
+#include "qom/object.h"
 
 #define TYPE_XLNX_VERSAL_VIRT_MACHINE MACHINE_TYPE_NAME("xlnx-versal-virt")
+typedef struct VersalVirt VersalVirt;
 #define XLNX_VERSAL_VIRT_MACHINE(obj) \
     OBJECT_CHECK(VersalVirt, (obj), TYPE_XLNX_VERSAL_VIRT_MACHINE)
 
-typedef struct VersalVirt {
+struct VersalVirt {
     MachineState parent_obj;
 
     Versal soc;
@@ -45,7 +47,7 @@ typedef struct VersalVirt {
     struct {
         bool secure;
     } cfg;
-} VersalVirt;
+};
 
 static void fdt_create(VersalVirt *s)
 {
diff --git a/hw/arm/xlnx-zcu102.c b/hw/arm/xlnx-zcu102.c
index 672d9d4bd1..74f48325ac 100644
--- a/hw/arm/xlnx-zcu102.c
+++ b/hw/arm/xlnx-zcu102.c
@@ -24,8 +24,9 @@
 #include "qemu/log.h"
 #include "sysemu/qtest.h"
 #include "sysemu/device_tree.h"
+#include "qom/object.h"
 
-typedef struct XlnxZCU102 {
+struct XlnxZCU102 {
     MachineState parent_obj;
 
     XlnxZynqMPState soc;
@@ -34,7 +35,8 @@ typedef struct XlnxZCU102 {
     bool virt;
 
     struct arm_boot_info binfo;
-} XlnxZCU102;
+};
+typedef struct XlnxZCU102 XlnxZCU102;
 
 #define TYPE_ZCU102_MACHINE   MACHINE_TYPE_NAME("xlnx-zcu102")
 #define ZCU102_MACHINE(obj) \
diff --git a/hw/arm/z2.c b/hw/arm/z2.c
index 9a9bbc653b..9c69481269 100644
--- a/hw/arm/z2.c
+++ b/hw/arm/z2.c
@@ -26,6 +26,7 @@
 #include "exec/address-spaces.h"
 #include "sysemu/qtest.h"
 #include "cpu.h"
+#include "qom/object.h"
 
 #ifdef DEBUG_Z2
 #define DPRINTF(fmt, ...) \
@@ -102,14 +103,15 @@ static struct arm_boot_info z2_binfo = {
 #define Z2_GPIO_KEY_ON      1
 #define Z2_GPIO_LCD_CS      88
 
-typedef struct {
+struct ZipitLCD {
     SSISlave ssidev;
     int32_t selected;
     int32_t enabled;
     uint8_t buf[3];
     uint32_t cur_reg;
     int pos;
-} ZipitLCD;
+};
+typedef struct ZipitLCD ZipitLCD;
 
 #define TYPE_ZIPIT_LCD "zipit-lcd"
 #define ZIPIT_LCD(obj) OBJECT_CHECK(ZipitLCD, (obj), TYPE_ZIPIT_LCD)
@@ -195,14 +197,15 @@ static const TypeInfo zipit_lcd_info = {
 };
 
 #define TYPE_AER915 "aer915"
+typedef struct AER915State AER915State;
 #define AER915(obj) OBJECT_CHECK(AER915State, (obj), TYPE_AER915)
 
-typedef struct AER915State {
+struct AER915State {
     I2CSlave parent_obj;
 
     int len;
     uint8_t buf[3];
-} AER915State;
+};
 
 static int aer915_send(I2CSlave *i2c, uint8_t data)
 {