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authorSubbaraya Sundeep <sundeep.lkml@gmail.com>2017-10-31 11:50:52 +0000
committerPeter Maydell <peter.maydell@linaro.org>2017-10-31 11:50:52 +0000
commitdb7b98c6bb57312a49d9c47ee890e5e50a1db86d (patch)
tree32b026f5277434fef9af422bd15ebe1c76ad814c /hw/arm
parentcda607d5e0178d0268066d94dd06b89614304a7d (diff)
msf2: Wire up SYSRESETREQ in SoC for system reset
Implemented system reset by creating SYSRESETREQ gpio out from nvic. Signed-off-by: Subbaraya Sundeep <sundeep.lkml@gmail.com> Message-id: 1509253165-7434-1-git-send-email-sundeep.lkml@gmail.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/arm')
-rw-r--r--hw/arm/msf2-soc.c11
1 files changed, 11 insertions, 0 deletions
diff --git a/hw/arm/msf2-soc.c b/hw/arm/msf2-soc.c
index 6f97fa9fe3..a8ec2cdf36 100644
--- a/hw/arm/msf2-soc.c
+++ b/hw/arm/msf2-soc.c
@@ -57,6 +57,13 @@ static const int spi_irq[MSF2_NUM_SPIS] = { 2, 3 };
static const int uart_irq[MSF2_NUM_UARTS] = { 10, 11 };
static const int timer_irq[MSF2_NUM_TIMERS] = { 14, 15 };
+static void do_sys_reset(void *opaque, int n, int level)
+{
+ if (level) {
+ qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET);
+ }
+}
+
static void m2sxxx_soc_initfn(Object *obj)
{
MSF2State *s = MSF2_SOC(obj);
@@ -125,6 +132,10 @@ static void m2sxxx_soc_realize(DeviceState *dev_soc, Error **errp)
error_append_hint(errp, "m3clk can not be zero\n");
return;
}
+
+ qdev_connect_gpio_out_named(DEVICE(&s->armv7m.nvic), "SYSRESETREQ", 0,
+ qemu_allocate_irq(&do_sys_reset, NULL, 0));
+
system_clock_scale = NANOSECONDS_PER_SECOND / s->m3clk;
for (i = 0; i < MSF2_NUM_UARTS; i++) {