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authorBlue Swirl <blauwirbel@gmail.com>2013-04-20 11:39:08 +0000
committerBlue Swirl <blauwirbel@gmail.com>2013-04-20 11:39:08 +0000
commitf4374c82b158b36bd40a5055bffa60796569a300 (patch)
tree38fe70e65ee51b6cd69b2721177b6aca58287e07 /hw/arm
parent32370db3fb8433259435397c4d60006164c0d198 (diff)
parentaf9277e69df688ebb8ccccb7edecc45f0f85ea51 (diff)
Merge branch 'arm-devs.next' of git://git.linaro.org/people/pmaydell/qemu-arm
* 'arm-devs.next' of git://git.linaro.org/people/pmaydell/qemu-arm: hw/versatile_pci: Drop unnecessary vpb_pci_config_addr() versatile_pci: Expose PCI memory space to system arm/realview: Fix mapping of PCI regions versatile_pci: Implement the PCI controller's control registers versatile_pci: Implement the correct PCI IRQ mapping versatile_pci: Put the host bridge PCI device at slot 29 versatile_pci: Use separate PCI I/O space rather than system I/O space versatile_pci: Change to subclassing TYPE_PCI_HOST_BRIDGE versatile_pci: Update to realize and instance init functions versatile_pci: Expose PCI I/O region on Versatile PB versatile_pci: Fix hardcoded tabs
Diffstat (limited to 'hw/arm')
-rw-r--r--hw/arm/realview.c22
-rw-r--r--hw/arm/versatilepb.c11
2 files changed, 20 insertions, 13 deletions
diff --git a/hw/arm/realview.c b/hw/arm/realview.c
index feabfc58d4..d6f47bf4d4 100644
--- a/hw/arm/realview.c
+++ b/hw/arm/realview.c
@@ -217,9 +217,13 @@ static void realview_init(QEMUMachineInitArgs *args,
dev = qdev_create(NULL, "realview_pci");
busdev = SYS_BUS_DEVICE(dev);
qdev_init_nofail(dev);
- sysbus_mmio_map(busdev, 0, 0x61000000); /* PCI self-config */
- sysbus_mmio_map(busdev, 1, 0x62000000); /* PCI config */
- sysbus_mmio_map(busdev, 2, 0x63000000); /* PCI I/O */
+ sysbus_mmio_map(busdev, 0, 0x10019000); /* PCI controller registers */
+ sysbus_mmio_map(busdev, 1, 0x60000000); /* PCI self-config */
+ sysbus_mmio_map(busdev, 2, 0x61000000); /* PCI config */
+ sysbus_mmio_map(busdev, 3, 0x62000000); /* PCI I/O */
+ sysbus_mmio_map(busdev, 4, 0x63000000); /* PCI memory window 1 */
+ sysbus_mmio_map(busdev, 5, 0x64000000); /* PCI memory window 2 */
+ sysbus_mmio_map(busdev, 6, 0x68000000); /* PCI memory window 3 */
sysbus_connect_irq(busdev, 0, pic[48]);
sysbus_connect_irq(busdev, 1, pic[49]);
sysbus_connect_irq(busdev, 2, pic[50]);
@@ -303,12 +307,12 @@ static void realview_init(QEMUMachineInitArgs *args,
/* 0x58000000 PISMO. */
/* 0x5c000000 PISMO. */
/* 0x60000000 PCI. */
- /* 0x61000000 PCI Self Config. */
- /* 0x62000000 PCI Config. */
- /* 0x63000000 PCI IO. */
- /* 0x64000000 PCI mem 0. */
- /* 0x68000000 PCI mem 1. */
- /* 0x6c000000 PCI mem 2. */
+ /* 0x60000000 PCI Self Config. */
+ /* 0x61000000 PCI Config. */
+ /* 0x62000000 PCI IO. */
+ /* 0x63000000 PCI mem 0. */
+ /* 0x64000000 PCI mem 1. */
+ /* 0x68000000 PCI mem 2. */
/* ??? Hack to map an additional page of ram for the secondary CPU
startup code. I guess this works on real hardware because the
diff --git a/hw/arm/versatilepb.c b/hw/arm/versatilepb.c
index 25c665ab27..753757ea19 100644
--- a/hw/arm/versatilepb.c
+++ b/hw/arm/versatilepb.c
@@ -224,16 +224,19 @@ static void versatile_init(QEMUMachineInitArgs *args, int board_id)
dev = qdev_create(NULL, "versatile_pci");
busdev = SYS_BUS_DEVICE(dev);
qdev_init_nofail(dev);
- sysbus_mmio_map(busdev, 0, 0x41000000); /* PCI self-config */
- sysbus_mmio_map(busdev, 1, 0x42000000); /* PCI config */
+ sysbus_mmio_map(busdev, 0, 0x10001000); /* PCI controller regs */
+ sysbus_mmio_map(busdev, 1, 0x41000000); /* PCI self-config */
+ sysbus_mmio_map(busdev, 2, 0x42000000); /* PCI config */
+ sysbus_mmio_map(busdev, 3, 0x43000000); /* PCI I/O */
+ sysbus_mmio_map(busdev, 4, 0x44000000); /* PCI memory window 1 */
+ sysbus_mmio_map(busdev, 5, 0x50000000); /* PCI memory window 2 */
+ sysbus_mmio_map(busdev, 6, 0x60000000); /* PCI memory window 3 */
sysbus_connect_irq(busdev, 0, sic[27]);
sysbus_connect_irq(busdev, 1, sic[28]);
sysbus_connect_irq(busdev, 2, sic[29]);
sysbus_connect_irq(busdev, 3, sic[30]);
pci_bus = (PCIBus *)qdev_get_child_bus(dev, "pci");
- /* The Versatile PCI bridge does not provide access to PCI IO space,
- so many of the qemu PCI devices are not useable. */
for(n = 0; n < nb_nics; n++) {
nd = &nd_table[n];