diff options
author | Peter Crosthwaite <peter.crosthwaite@xilinx.com> | 2015-05-14 19:23:12 -0700 |
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committer | Peter Maydell <peter.maydell@linaro.org> | 2015-05-18 16:41:11 +0100 |
commit | 14ca2e462ee137974d81729b1d88d9d39cf2f22c (patch) | |
tree | dab8657f40aafe8775f21f3fd8dc35c574f0981e /hw/arm/xlnx-zynqmp.c | |
parent | f49856d4e65703e347ee3e2277a87282ce601bcd (diff) |
arm: xlnx-zynqmp: Add GEM support
There are 4x Cadence GEMs in ZynqMP. Add them.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Tested-by: Alistair Francis <alistair.francis@xilinx.com>
Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Message-id: 7d3e68e5495d145255f0ee567046415e3a26d67e.1431381507.git.peter.crosthwaite@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/arm/xlnx-zynqmp.c')
-rw-r--r-- | hw/arm/xlnx-zynqmp.c | 35 |
1 files changed, 35 insertions, 0 deletions
diff --git a/hw/arm/xlnx-zynqmp.c b/hw/arm/xlnx-zynqmp.c index f98e9f73a5..456dea0a6c 100644 --- a/hw/arm/xlnx-zynqmp.c +++ b/hw/arm/xlnx-zynqmp.c @@ -28,6 +28,14 @@ #define GIC_DIST_ADDR 0xf9010000 #define GIC_CPU_ADDR 0xf9020000 +static const uint64_t gem_addr[XLNX_ZYNQMP_NUM_GEMS] = { + 0xFF0B0000, 0xFF0C0000, 0xFF0D0000, 0xFF0E0000, +}; + +static const int gem_intr[XLNX_ZYNQMP_NUM_GEMS] = { + 57, 59, 61, 63, +}; + typedef struct XlnxZynqMPGICRegion { int region_index; uint32_t address; @@ -57,6 +65,11 @@ static void xlnx_zynqmp_init(Object *obj) object_initialize(&s->gic, sizeof(s->gic), TYPE_ARM_GIC); qdev_set_parent_bus(DEVICE(&s->gic), sysbus_get_default()); + + for (i = 0; i < XLNX_ZYNQMP_NUM_GEMS; i++) { + object_initialize(&s->gem[i], sizeof(s->gem[i]), TYPE_CADENCE_GEM); + qdev_set_parent_bus(DEVICE(&s->gem[i]), sysbus_get_default()); + } } static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp) @@ -64,6 +77,7 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp) XlnxZynqMPState *s = XLNX_ZYNQMP(dev); MemoryRegion *system_memory = get_system_memory(); uint8_t i; + qemu_irq gic_spi[GIC_NUM_SPI_INTR]; Error *err = NULL; qdev_prop_set_uint32(DEVICE(&s->gic), "num-irq", GIC_NUM_SPI_INTR + 32); @@ -127,6 +141,27 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp) arm_gic_ppi_index(i, ARM_VIRT_TIMER_PPI)); qdev_connect_gpio_out(DEVICE(&s->cpu[i]), 1, irq); } + + for (i = 0; i < GIC_NUM_SPI_INTR; i++) { + gic_spi[i] = qdev_get_gpio_in(DEVICE(&s->gic), i); + } + + for (i = 0; i < XLNX_ZYNQMP_NUM_GEMS; i++) { + NICInfo *nd = &nd_table[i]; + + if (nd->used) { + qemu_check_nic_model(nd, TYPE_CADENCE_GEM); + qdev_set_nic_properties(DEVICE(&s->gem[i]), nd); + } + object_property_set_bool(OBJECT(&s->gem[i]), true, "realized", &err); + if (err) { + error_propagate((errp), (err)); + return; + } + sysbus_mmio_map(SYS_BUS_DEVICE(&s->gem[i]), 0, gem_addr[i]); + sysbus_connect_irq(SYS_BUS_DEVICE(&s->gem[i]), 0, + gic_spi[gem_intr[i]]); + } } static void xlnx_zynqmp_class_init(ObjectClass *oc, void *data) |