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authorPeter Maydell <peter.maydell@linaro.org>2017-09-20 17:35:36 +0100
committerPeter Maydell <peter.maydell@linaro.org>2017-09-20 17:35:36 +0100
commitd3f5433c7b4aa2d59c6de4175743f4126e181aea (patch)
tree4f800d0b63205194e3049a23b378783e21b96d8a /hw/arm/vexpress.c
parentc51700273ad9802a21c19f8d2b4bcb67c38e74ac (diff)
parente3d038b89f1bf3f09da4d59aa16b16e8305e1a05 (diff)
Merge remote-tracking branch 'remotes/ehabkost/tags/machine-next-pull-request' into staging
Machine/CPU/NUMA queue, 2017-09-19 # gpg: Signature made Tue 19 Sep 2017 21:17:01 BST # gpg: using RSA key 0x2807936F984DC5A6 # gpg: Good signature from "Eduardo Habkost <ehabkost@redhat.com>" # Primary key fingerprint: 5A32 2FD5 ABC4 D3DB ACCF D1AA 2807 936F 984D C5A6 * remotes/ehabkost/tags/machine-next-pull-request: MAINTAINERS: Update git URLs for my trees hw/acpi-build: Fix SRAT memory building in case of node 0 without RAM NUMA: Replace MAX_NODES with nb_numa_nodes in for loop numa: cpu: calculate/set default node-ids after all -numa CLI options are parsed arm: drop intermediate cpu_model -> cpu type parsing and use cpu type directly pc: use generic cpu_model parsing vl.c: convert cpu_model to cpu type and set of global properties before machine_init() cpu: make cpu_generic_init() abort QEMU on error qom: cpus: split cpu_generic_init() on feature parsing and cpu creation parts hostmem-file: Add "discard-data" option osdep: Define QEMU_MADV_REMOVE vl: Clean up user-creatable objects when exiting Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/arm/vexpress.c')
-rw-r--r--hw/arm/vexpress.c32
1 files changed, 10 insertions, 22 deletions
diff --git a/hw/arm/vexpress.c b/hw/arm/vexpress.c
index 96c5eebeaf..efb5a29475 100644
--- a/hw/arm/vexpress.c
+++ b/hw/arm/vexpress.c
@@ -186,7 +186,7 @@ typedef struct {
typedef void DBoardInitFn(const VexpressMachineState *machine,
ram_addr_t ram_size,
- const char *cpu_model,
+ const char *cpu_type,
qemu_irq *pic);
struct VEDBoardInfo {
@@ -202,22 +202,16 @@ struct VEDBoardInfo {
DBoardInitFn *init;
};
-static void init_cpus(const char *cpu_model, const char *privdev,
+static void init_cpus(const char *cpu_type, const char *privdev,
hwaddr periphbase, qemu_irq *pic, bool secure)
{
- ObjectClass *cpu_oc = cpu_class_by_name(TYPE_ARM_CPU, cpu_model);
DeviceState *dev;
SysBusDevice *busdev;
int n;
- if (!cpu_oc) {
- fprintf(stderr, "Unable to find CPU definition\n");
- exit(1);
- }
-
/* Create the actual CPUs */
for (n = 0; n < smp_cpus; n++) {
- Object *cpuobj = object_new(object_class_get_name(cpu_oc));
+ Object *cpuobj = object_new(cpu_type);
if (!secure) {
object_property_set_bool(cpuobj, false, "has_el3", NULL);
@@ -262,7 +256,7 @@ static void init_cpus(const char *cpu_model, const char *privdev,
static void a9_daughterboard_init(const VexpressMachineState *vms,
ram_addr_t ram_size,
- const char *cpu_model,
+ const char *cpu_type,
qemu_irq *pic)
{
MemoryRegion *sysmem = get_system_memory();
@@ -270,10 +264,6 @@ static void a9_daughterboard_init(const VexpressMachineState *vms,
MemoryRegion *lowram = g_new(MemoryRegion, 1);
ram_addr_t low_ram_size;
- if (!cpu_model) {
- cpu_model = "cortex-a9";
- }
-
if (ram_size > 0x40000000) {
/* 1GB is the maximum the address space permits */
fprintf(stderr, "vexpress-a9: cannot model more than 1GB RAM\n");
@@ -295,7 +285,7 @@ static void a9_daughterboard_init(const VexpressMachineState *vms,
memory_region_add_subregion(sysmem, 0x60000000, ram);
/* 0x1e000000 A9MPCore (SCU) private memory region */
- init_cpus(cpu_model, TYPE_A9MPCORE_PRIV, 0x1e000000, pic, vms->secure);
+ init_cpus(cpu_type, TYPE_A9MPCORE_PRIV, 0x1e000000, pic, vms->secure);
/* Daughterboard peripherals : 0x10020000 .. 0x20000000 */
@@ -351,17 +341,13 @@ static VEDBoardInfo a9_daughterboard = {
static void a15_daughterboard_init(const VexpressMachineState *vms,
ram_addr_t ram_size,
- const char *cpu_model,
+ const char *cpu_type,
qemu_irq *pic)
{
MemoryRegion *sysmem = get_system_memory();
MemoryRegion *ram = g_new(MemoryRegion, 1);
MemoryRegion *sram = g_new(MemoryRegion, 1);
- if (!cpu_model) {
- cpu_model = "cortex-a15";
- }
-
{
/* We have to use a separate 64 bit variable here to avoid the gcc
* "comparison is always false due to limited range of data type"
@@ -380,7 +366,7 @@ static void a15_daughterboard_init(const VexpressMachineState *vms,
memory_region_add_subregion(sysmem, 0x80000000, ram);
/* 0x2c000000 A15MPCore private memory region (GIC) */
- init_cpus(cpu_model, TYPE_A15MPCORE_PRIV, 0x2c000000, pic, vms->secure);
+ init_cpus(cpu_type, TYPE_A15MPCORE_PRIV, 0x2c000000, pic, vms->secure);
/* A15 daughterboard peripherals: */
@@ -560,7 +546,7 @@ static void vexpress_common_init(MachineState *machine)
const hwaddr *map = daughterboard->motherboard_map;
int i;
- daughterboard->init(vms, machine->ram_size, machine->cpu_model, pic);
+ daughterboard->init(vms, machine->ram_size, machine->cpu_type, pic);
/*
* If a bios file was provided, attempt to map it into memory
@@ -761,6 +747,7 @@ static void vexpress_a9_class_init(ObjectClass *oc, void *data)
VexpressMachineClass *vmc = VEXPRESS_MACHINE_CLASS(oc);
mc->desc = "ARM Versatile Express for Cortex-A9";
+ mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-a9");
vmc->daughterboard = &a9_daughterboard;
}
@@ -771,6 +758,7 @@ static void vexpress_a15_class_init(ObjectClass *oc, void *data)
VexpressMachineClass *vmc = VEXPRESS_MACHINE_CLASS(oc);
mc->desc = "ARM Versatile Express for Cortex-A15";
+ mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-a15");
vmc->daughterboard = &a15_daughterboard;
}