diff options
author | Peter Maydell <peter.maydell@linaro.org> | 2021-08-12 10:33:56 +0100 |
---|---|---|
committer | Peter Maydell <peter.maydell@linaro.org> | 2021-09-01 11:08:21 +0100 |
commit | 683754c7b61f9e2ff098720ec80c9ab86c54663d (patch) | |
tree | 2fcfe981edd85c7b87f40bab3332cee57d49604c /hw/arm/stellaris.c | |
parent | d18fdd69d0e417f15a388bd7a2e3d6bd2d3672a5 (diff) |
arm: Remove system_clock_scale global
All the devices that used to use system_clock_scale have now been
converted to use Clock inputs instead, so the global is no longer
needed; remove it and all the code that sets it.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-id: 20210812093356.1946-26-peter.maydell@linaro.org
Diffstat (limited to 'hw/arm/stellaris.c')
-rw-r--r-- | hw/arm/stellaris.c | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/hw/arm/stellaris.c b/hw/arm/stellaris.c index 3e7d1dabad..78827ace6b 100644 --- a/hw/arm/stellaris.c +++ b/hw/arm/stellaris.c @@ -263,17 +263,18 @@ static bool ssys_use_rcc2(ssys_state *s) */ static void ssys_calculate_system_clock(ssys_state *s, bool propagate_clock) { + int period_ns; /* * SYSDIV field specifies divisor: 0 == /1, 1 == /2, etc. Input * clock is 200MHz, which is a period of 5 ns. Dividing the clock * frequency by X is the same as multiplying the period by X. */ if (ssys_use_rcc2(s)) { - system_clock_scale = 5 * (((s->rcc2 >> 23) & 0x3f) + 1); + period_ns = 5 * (((s->rcc2 >> 23) & 0x3f) + 1); } else { - system_clock_scale = 5 * (((s->rcc >> 23) & 0xf) + 1); + period_ns = 5 * (((s->rcc >> 23) & 0xf) + 1); } - clock_set_ns(s->sysclk, system_clock_scale); + clock_set_ns(s->sysclk, period_ns); if (propagate_clock) { clock_propagate(s->sysclk); } |