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authorNiek Linnenbank <nieklinnenbank@gmail.com>2020-03-11 23:18:47 +0100
committerPeter Maydell <peter.maydell@linaro.org>2020-03-12 16:27:33 +0000
commitb71d0385e97e230b45a88c604756c44a748736fb (patch)
treeb616aa90b05ea1acb4e497fe6aa1d9cabe759864 /hw/arm/orangepi.c
parenta80beb160d4e89937b0afccb146a9f3247f88588 (diff)
hw/arm/allwinner-h3: add SDRAM controller device
In the Allwinner H3 SoC the SDRAM controller is responsible for interfacing with the external Synchronous Dynamic Random Access Memory (SDRAM). Types of memory that the SDRAM controller supports are DDR2/DDR3 and capacities of up to 2GiB. This commit adds emulation support of the Allwinner H3 SDRAM controller. Signed-off-by: Niek Linnenbank <nieklinnenbank@gmail.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 20200311221854.30370-12-nieklinnenbank@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/arm/orangepi.c')
-rw-r--r--hw/arm/orangepi.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/hw/arm/orangepi.c b/hw/arm/orangepi.c
index b8ebcb08b7..181f5badab 100644
--- a/hw/arm/orangepi.c
+++ b/hw/arm/orangepi.c
@@ -80,6 +80,12 @@ static void orangepi_init(MachineState *machine)
/* Setup EMAC properties */
object_property_set_int(OBJECT(&h3->emac), 1, "phy-addr", &error_abort);
+ /* DRAMC */
+ object_property_set_uint(OBJECT(h3), h3->memmap[AW_H3_SDRAM],
+ "ram-addr", &error_abort);
+ object_property_set_int(OBJECT(h3), machine->ram_size / MiB, "ram-size",
+ &error_abort);
+
/* Mark H3 object realized */
object_property_set_bool(OBJECT(h3), true, "realized", &error_abort);